Microchip Libero® SoC Design Suite
Libero® SoC Design Suite offers high productivity and v12.4 is available with a number of major updates
Libero SoC Design Suite v12.4 is available with a number of major updates. First, we’re introducing a new radiation-tolerant PolarFire RTPF500T-CG1509-MIL FPGA device. This release is also delivering production timing and power data for PolarFire 100T/200T/300T FPGA military devices for 1.0V STD and -1 speed grade and preliminary timing and power data for PolarFire100T/200T/300T FPGA military devices for 1.05V STD and -1 speed grade.
With Libero SoC v12.4, users will see an estimated 40% improved runtime for generating timing reports, especially on large designs with multiple clock domains. Microchip added a new Clock Domain Crossing (CDC) report in their SmartTime tool. This release also supports generic IOD for wide interfaces (up to 128 I/Os) for all transmit, fractional receive and non-fractional interfaces. There is also back-annotated simulation for all fabric components of PolarFire.
Additionally, this release introduces independent RX support with ERM and new Eye mask feature in SmartDebug for PolarFire XCVR. This release also supports FlashPro 6 for Identify debug tool. It provides multi-corner Min Delay Repair for PolarFire, SmartFusion 2, IGLOO® 2 and RTG4™ FPGA designs. This release integrates license installation flow with Libero installer and also provides a Tcl example design to check license errors. It also introduces Ubuntu® operating system support. Libero SoC Design Suite v12.4 is upgraded to support large disk drives (more than 2 TB) for Linux platforms.