Infineon Point-of-Load

Infineon Point-of-Load Solutions for FPGA/SoC/ASICs and Multicore ARMs

Infineon’s Integrated POL switching converters deliver benchmark efficiency and dramatically reduce system size: A closer look at IRPS5401M, a PMBus multi-output PMIC.

Infineon IRPS5401M product image

Solutions up to 35 A are available in compact PQFN packages.Target applications include server, storage, routers and switches, telecom base stations, digital home media, mobile computing and embedded data processing. Solutions with and without PMBus digital communication are available in single output and multi-rail format

Infineon IRPS5401M - PMBus multi-output PMIC for next generation FPGA/SoC from 10 W to 50 W

The IRPS5401 is an integrated power management IC ideal for tight board space requirements; for example, FPGAs, System On Chip ASICs and multi-core processors containing several voltages that require precision accuracy and voltage sequencing.


  • Multi-output DC/DC with integrated FETs and Sequencer
  • 4 switchers and 1 LDO in one package
    • Output A: 2 A (without), 50 A (with power stage, TDA21240)
    • Output B: 2 A
    • Outputs C,D: 4 A
    • Linear regulator: +/-0.5 A
  • Full PMBus 1.2: 72 command sets, fault Management, telemetry
  • Full power system including 5 integrated outputs 
    • 4A, 4A, 2A and 2A Switching Regulators 
    • 500mA Source/Sink Linear regulator 
  • Single rail operation 5V to 12V 
  • Allows combining outputs and/or the use of an external PowIRstage to increase output current to as high as 50A 
  • Emulated current mode control without external compensation 
  • Differential voltage sensing on Switcher A for higher accuracy 
  • Advanced Sequencing control 
  • Integrated current sensing and full telemetry including voltage, current, temperature and faults 
  • Rated for -40°C to +125°C TJ operation 
  • Pb-Free, RoHS6, 7x7mm, 56-pin, 0.4mm pitch QFN


  • Simplified BOM: Replace many regulators with one PMIC. Scalable Core voltages from 2A to 50A.  Options for low noise SERDES.
  • Design re-use: One design is scalable to cover wide range of FPGAs and ASICs
  • Lower total solution cost: Eliminates external sequencer, Programmable PID compensation, No external components required for PID compensation
  • 35% board area reduction: High level integration and component reduction
  • Telemetry status via digital bus
  • Remote monitoring and update
  • Flexibile sequencing
  • High accuracy/low ripple


  • High density ASIC, FPGA & CPU multi-rail systems 10W to 50W
  • Xilinx Zynq ZU02 to ZU19 Embedded Computing systems and Similar SoC
  • Hardware Acceleration in Communications and Storage systems
  • Video / Audio DSP Processing and Hardware Acceleration
  • Machine Vision, AI, and Machine Learning
  • IoT and Sensor and Camera Applications
  • DSP intensive applications:  Radar/Sonar, Medical Imaging, Signal Conditioning Instrumentation, Chemical Analyzers, Surveying and Complex Site Navigation

Typical application set-up

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