Using Programmable Logic to Build Power-Efficient Systems
The successful implementation of the Internet of Things (IoT) requires new thinking about how to . The amount of connectivity and the wide range of applications for these soon-to-be ubiquitous devices will rule out traditional approaches to reducing power.
A sensor, for example, might only need a small amount of bandwidth, a small amount of storage, and a leisurely wake-up time, while a high-speed communications port might have the exact opposite set of requirements. Implementing the processing, storage and communication functions require a layered architecture, with a variety of interface requirements and rapid changes to functionality. Programmable logic has traditionally been the “go-to” technology for implementing embedded systems that must respond rapidly to changing requirements, since new interfaces or new functions can be easily added by reprogramming.
Traditional power-saving approaches tend to focus on powering down portions of a device that aren’t necessary for the current processing task. The core processor in an MCU, for example, can be put into sleep mode to save power. This approach is most appropriate when a single device is involved, such as in a power meter or a smoke detector when the need for processing is fairly predictable. When the device is part of a hierarchical and distributed network, it can be much more difficult to determine when a device can be put into a low-power mode.
Power Functions As Needed
As the IoT is optimized for power efficiency, it may be more appropriate to have “islands” of available functions (such as communication, storage, or processing) that can be called upon as needed. Various levels of performance would also be necessary depending on the response time and amount of real-time processing, storage or communications required. Some FPGAs, like the Microsemi IGLOO2 FPGAs, have special low-power capabilities that can further improve power efficiency. Engineers can learn more about IGLOO2 FPGAs by attending a hands-on Speedway Design Workshop offered by Avnet.
A heterogeneous IoT network with different compute elements optimized for different tasks could respond automatically to requests by assigning the elements most efficient at implementing the application. For example, fast and small storage requests for data from a wearable device (perhaps one that is tracking heart rate and temperature to detect early signs of a virus), could be cached locally on a wearable bracelet until a data reservoir in an automobile or in a home were available. Once a reservoir with the appropriate amount of power and data storage is available, a bulk transfer of the cached data could be accomplished. Finding the most efficient path from the initial data source to the final destination will ultimately save power. With the large amounts of data flowing through IoT devices, programmable logic may well be the single largest power user. Tracking typical use patterns could help predict when an appropriate reservoir will be available and would thus avoid intermediate transfers that could drain power unnecessarily. Programmable logic could be used to create various levels of capability by adding logic, as needed, to efficiently process incoming requests.
The optimization of request fulfillment might be relegated to a processor on each device as part of a distributed OS. FPGAs with on-chip processors, like the Xilinx Zynq® All Programmable SoC, could run the required OS code and also serve as a flexible computation element when needed for local processing. The FPGA fabric could provide additional hardware acceleration for special functions as needed. Engineers can learn more about designing with Xilinx Zynq devices through: www.zedboard.org/.
Written By: Warren Miller