New Product Introduction

XILINX Virtex UltraScale+ HBM High Performance FPGA®

Based on the UltraScale architecture, the latest Virtex® UltraScale+ devices provide the highest performance, including the highest signal processing bandwidth at 21.2 TeraMACs of DSP compute performance

XILINX Virtex UltraScale+ HBM FPGA® product image

Based on the UltraScale architecture, the latest Virtex® UltraScale+ devices provide the highest performance, including the highest signal processing bandwidth at 21.2 TeraMACs of DSP compute performance. They also deliver the highest on-chip memory density with up to 500Mb of total on-chip integrated memory, plus up to 8GB of HBM Gen2 integrated in-package for 460GB/s of memory bandwidth. Virtex UltraScale+ devices deliver significant capabilities with integrated IP for PCI Express, Interlaken, 100G Ethernet with FEC, and Cache Coherent Interconnect for Accelerators (CCIX).

 

Features

  • Up to 8GB of HBM Gen2 integrated in-package
  • 460GB/s HBM bandwidth, and 2,666 Mb/s DDR4 in a mid-speed grade
  • 38 TOP/s DSP compute performance
  • Up to 128 transceivers operating @ 32.75Gb/s or 48 PAM4 transceivers operating at 58Gb/s

 

Additional features

  • Up to 8GB of HBM Gen2 integrated in-package
  • Up to 500Mb of on-chip memory integration
  • Integrated 100G Ethernet MAC with KR4-FEC and 150G Interlaken cores
  • Integrated blocks for PCI Express Gen 3x16
  • Over 2X system-level performance per watt over Virtex-7 FPGAs
  • Up to four speed-grade improvement with high utilization
  • Up to 128-33G transceivers deliver 8.4 Tb of serial bandwidth
  • 58G PAM4 transceivers with KP4-FEC enable data transmission at 50G+ line rates
  • 460GB/s HBM bandwidth, and 2,666 Mb/s DDR4 in a mid-speed grade
  • A 5:1 card reduction for 1 Tb MuxSAR transponder
  • UltraRAM for on-chip memory integration
  • VCXO and fractional PLL integration reduces clocking component cost
  • Up to 60% lower power vs. 7 series FPGAs
  • Voltage scaling options for performance and power
  • Tighter logic cell packing reduces dynamic power
  • Seamless footprint migration from 20nm planar to 16 nm FinFET+
  • Co-optimized with Vivado Design Suite for rapid design closure
  • SmartConnect technology for intelligent IP integration


Applications

  • AI

XILINX Virtex UltraScale+ HBM FPGA® | EBV Elektronik

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