Nowadays, high quality, ease-of-use, power efficiency, high level of integration, fast time-to-market and cost effectiveness are required in imaging applications.
To meet these requirements, STM32 MCUs embed a digital camera interface (DCMI), allowing connection to efficient parallel camera modules.
In addition, STM32 MCUs provide many performance levels (CPU, MCU subsystem, DSP and FPU). They also provide various power modes, an extensive set of peripheral and interface combinations (SPI, UART, I2C, SDIO, USB, ETHERNET, I2S...), a rich graphical portfolio (LTDC, QSPI, DMA2D,...) and an industry-leading development environment ensuring sophisticated applications and connectivity solutions (IOT).
The featured products include:
The DCMI applications need a frame buffer to store the captured image(s). It is then necessary to use a memory destination that varies depending on the image size and the transfer speed.
In some applications, it is necessary to interface with external memories that offer big sizes for data storage. For this reason, the Quad-SPI can be used. For more details, refer to the application note Quad-SPI interface on STM32 microcontrollers (AN4760).
The DMA2D (Chrom-ART Accelerator™ controller) is useful for color spaces transformation (such as RGB565 to ARGB8888), or for data transfer from one memory to another.
The JPEG codec allows data compression (JPEG encoding) or decompression (JPEG decoding).
Features of STM32F407
- Digital camera interface (DCMI) availability across the different STM32 devices
- Gives an easy-to-understand explanation on the DCMI integration in the STM32 MCUs architecture
- Full features function support and high performance with reasonable cost MCU and analog
Digital camera interface for STM32 MCUs: This application note gives STM32 users a grasp of basic concepts, with easy-to-understand explanations of the features, architecture and configuration of the DCMI. It is supported by an extensive set of detailed examples.
STM32F2x7 line devices are based on a 32-bit multi-layer bus matrix, allowing the interconnection between eight masters and seven slaves.
The DCMI is a slave AHB2 peripheral. The DMA2 performs the data transfer from the DCMI to internal SRAMs or external memories through the FSMC.
This figure shows the DCMI interconnection and the data path in STM32F2x7xx devices.