Winning Combinations to Design Faster

Xilinx UltraScale+ RFSoC Gen 1 / 2

Spotlight on timing devices for ZU2x & ZU3x

Xilinx’s Zynq® UltraScale+™ RFSoCs integrate multi-gigasample RF data converters and soft-decision forward error correction (SD-FEC) into an SoC architecture. The multi-generation portfolio features a breadth of devices with varying direct RF performance to meet diverse spectrum needs and use cases. The integration of direct RF-sampling data converters offers the most flexible, smallest footprint, and lowest power solution for a wide range of radio applications. Although Xilinx has released a Gen3 version of this family, the Gen 1 & 2 are still in heavy use in the industry.

An SoC with this level of performance demands a high-current power supply with tight regulation and extremely low jitter clock sources. This winning combination highlights the power and timing devices that Xilinx chose for supporting their ZU2x & ZU3x products and additional suggested solutions that would be an excellent fit for many designs.

Visit the RFSOC ZU2x/3x page to learn more.

Key features:

  • Digital multi-phase power to deliver high current outputs with very low voltage ripple
  • Pre-programmed PMICs specifically designed to meet any use case
  • FemtoClock®NG Universal Translator capable of 1GHz outputs with jitter specs in compliance with Ethernet standards up to 25G. Devices supporting up to 8 independent outputs allows users to minimize footprints with maximum flexibility.
  • Added system synchronizer for IEEE 1588
radio towers at sunset

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System Synchronizer    
8A34001 System Synchronizer for IEEE 1588 - Eight Channels  


Block diagram

block diagram of Xilinx UltraScale+ RFSoC device

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