<?xml version="1.0" encoding="UTF-8" ?>
<!DOCTYPE sdkgen PUBLIC "sdkgen" "sdkgen.dtd" >
<sdkgen>
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_clockc_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_clockc" >
      <PARAMETERS>
        <PARAMETER NAME="C_UART_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_uart_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_MODEM" VALUE="FALSE" PARAM="pcw_uart0_internal_modem" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_UART0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_UART0" IRQID="59" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_UART0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="CPU_3OR2X" CLKFREQUENCY="pcw_apu_2x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="CPU_3OR2X"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="CPU_3OR2X"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="CPU_1X" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="CPU_1X" PARAM="pcw_ttc1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="LQSPI" CLKFREQUENCY="pcw_act_qspi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="REF_CLK" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="REF_CLK" PARAM="pcw_qspi_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SMC" CLKFREQUENCY="pcw_act_smc_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="REF_CLK" PARAM="pcw_smc_peripheral_valid"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="PCAP" CLKFREQUENCY="pcw_act_pcap_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="REF_CLK"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="REF_CLK"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="GEM0"  CLKFREQUENCY="pcw_enet0_internal_freqmhz">
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="REF_CLK" PARAM="pcw_enet0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="GEM1" CLKFREQUENCY="pcw_enet0_internal_freqmhz">
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="REF_CLK" PARAM="pcw_enet1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="FCLK0" CLKFREQUENCY="pcw_act_fpga0_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="FCLK0"/>
           <CONNECTION INSTANCE="ps7_top" PORT="FCLK_CLK0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="FCLK1" CLKFREQUENCY="pcw_act_fpga1_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="FCLK1"/>
           <CONNECTION INSTANCE="ps7_top" PORT="FCLK_CLK1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="FCLK2" CLKFREQUENCY="pcw_act_fpga2_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="FCLK2"/>
           <CONNECTION INSTANCE="ps7_top" PORT="FCLK_CLK2"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="FCLK3" CLKFREQUENCY="pcw_act_fpga3_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="FCLK3"/>
           <CONNECTION INSTANCE="ps7_top" PORT="FCLK_CLK3"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="CAN0" CLKFREQUENCY="pcw_act_can0_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_can_0" PORT="REF_CLK" PARAM="pcw_can0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="CAN1" CLKFREQUENCY="pcw_act_can1_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_can_1" PORT="REF_CLK" PARAM="pcw_can1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SDIO0" CLKFREQUENCY="pcw_act_sdio_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_sd_0" PORT="REF_CLK" PARAM="pcw_sd0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SDIO1" CLKFREQUENCY="pcw_act_sdio_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_sd_1" PORT="REF_CLK" PARAM="pcw_sd1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="UART0" CLKFREQUENCY="pcw_act_uart_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_uart_0" PORT="REF_CLK" PARAM="pcw_uart0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="UART1" CLKFREQUENCY="pcw_act_uart_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_uart_1" PORT="REF_CLK" PARAM="pcw_uart1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SPI0" CLKFREQUENCY="pcw_act_spi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_spi_0" PORT="REF_CLK" PARAM="pcw_spi0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SPI1" CLKFREQUENCY="pcw_act_spi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_spi_1" PORT="REF_CLK" PARAM="pcw_spi1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="DMA" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_dma_s" PORT="APB_CLK"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="USB0_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_usb_0" PORT="APER_CLK" PARAM="pcw_usb0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="USB1_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_usb_1" PORT="APER_CLK" PARAM="pcw_usb1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="GEM0_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="APER_CLK" PARAM="pcw_enet0_peripheral_enable" />
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="GEM1_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="APER_CLK" PARAM="pcw_enet1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SDIO0_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_sd_0" PORT="APER_CLK" PARAM="pcw_sd0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SDIO1_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_sd_1" PORT="APER_CLK" PARAM="pcw_sd1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SPI0_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_spi_0" PORT="APER_CLK" PARAM="pcw_spi0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SPI1_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_spi_1" PORT="APER_CLK" PARAM="pcw_spi1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="CAN0_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_can_0" PORT="APER_CLK" PARAM="pcw_can0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="CAN1_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_can_1" PORT="APER_CLK" PARAM="pcw_can1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="I2C0_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="APER_CLK" PARAM="pcw_i2c0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="I2C1_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="APER_CLK" PARAM="pcw_i2c1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="UART0_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_uart_0" PORT="APER_CLK" PARAM="pcw_uart0_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="UART1_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_uart_1" PORT="APER_CLK" PARAM="pcw_uart1_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="GPIO_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="APER_CLK" PARAM="pcw_gpio_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="LQSPI_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="APER_CLK" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="APER_CLK" PARAM="pcw_qspi_peripheral_enable"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SMC_APER" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="APER_CLK" PARAM="pcw_smc_peripheral_valid"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="SWDT" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz" >
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="APER_CLK"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_uart_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_uart" IS_ENABLE="pcw_uart0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0000FFF" />
        <PARAMETER NAME="C_UART_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_uart_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_MODEM" VALUE="FALSE" PARAM="pcw_uart0_internal_modem" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_uart_peripheral_freqmhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_UART0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_UART0" IRQID="59" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_UART0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_uart_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="UART0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="UART0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_uart_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_uart" IS_ENABLE="pcw_uart1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0001000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0001FFF" />
        <PARAMETER NAME="C_UART_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_uart_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_MODEM" VALUE="FALSE" PARAM="pcw_uart1_internal_modem" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_uart_peripheral_freqmhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_UART1" IRQID="82" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_UART1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_UART1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_uart_peripheral_freqmhz" >
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="UART1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="UART1_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_pl310_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_pl310" >
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F02000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F02FFF" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_pmu_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_pmu" >
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8891000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8891FFF" />
        <PARAMETER NAME="C_PMU1_S_AXI_BASEADDR" VALUE="0xF8893000" />
        <PARAMETER NAME="C_PMU1_S_AXI_HIGHADDR" VALUE="0xF8893FFF" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_PMU0" IRQID="37" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_PMU0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_PMU1" IRQID="38" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_PMU1"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_qspi_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_qspi" IS_ENABLE="pcw_qspi_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE000D000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE000DFFF" />
        <PARAMETER NAME="C_QSPI_CLK_FREQ_HZ" VALUE="200000000" PARAM="pcw_act_qspi_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_QSPI_MODE" VALUE="2" PARAM="pcw_qspi_internal_mode" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_FB_CLK" VALUE="1" PARAM="pcw_qspi_internal_fbclk" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_qspi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_QSPI" IRQID="51"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_QSPI"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_QSPI"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_qspi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="LQSPI"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="LQSPI_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_qspi_linear_0" IPTYPE="PERIPHERAL" MODCLASS="MEMORY_CNTLR" MODTYPE="ps7_qspi_linear" IS_ENABLE="pcw_qspi_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xFC000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xFCFFFFFF" PARAM="pcw_qspi_internal_highaddress" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_qspi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="LQSPI"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="LQSPI_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_nand_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_nand" IS_ENABLE="pcw_nand_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE1000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE1000FFF" />
        <PARAMETER NAME="C_NAND_CLK_FREQ_HZ" VALUE="200000000" PARAM="pcw_act_smc_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_NAND_WIDTH" VALUE="2" PARAM="pcw_nand_internal_mode" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
        <PARAMETER NAME="C_NAND_CYCLE_T0" VALUE="2" PARAM="PCW_SMC_NAND_CYCLE_T0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_NAND_CYCLE_T1" VALUE="2" PARAM="PCW_SMC_NAND_CYCLE_T1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_NAND_CYCLE_T2" VALUE="2" PARAM="PCW_SMC_NAND_CYCLE_T2" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_NAND_CYCLE_T3" VALUE="2" PARAM="PCW_SMC_NAND_CYCLE_T3" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_NAND_CYCLE_T4" VALUE="2" PARAM="PCW_SMC_NAND_CYCLE_T4" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_NAND_CYCLE_T5" VALUE="2" PARAM="PCW_SMC_NAND_CYCLE_T5" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_NAND_CYCLE_T6" VALUE="2" PARAM="PCW_SMC_NAND_CYCLE_T6" CHANGED_BY="USER"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_smc_peripheral_freqmhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_smcc_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_smcc" IS_ENABLE="pcw_smc_peripheral_valid">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE000E000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE100EFFF" />
        <PARAMETER NAME="C_NOR_CHIP_SEL0" VALUE="2" PARAM="pcw_nor_internal_cs0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_NOR_CHIP_SEL1" VALUE="2" PARAM="pcw_nor_internal_cs1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_SRAM_CHIP_SEL0" VALUE="2" PARAM="pcw_nor_internal_sram_cs0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_SRAM_CHIP_SEL1" VALUE="2" PARAM="pcw_nor_internal_sram_cs1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ADDR25" VALUE="2" PARAM="pcw_nor_internal_a25" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_SMC" IRQID="50"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_SMC"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_SMC"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_sram_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_sram" IS_ENABLE="pcw_nor_grp_sram_cs0_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE2000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE3FFFFFF" />
        <PARAMETER NAME="C_SRAM_CLK_FREQ_HZ" VALUE="2" PARAM="pcw_act_smc_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
        <PARAMETER NAME="C_SRAM_CYCLE_T0" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T0" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T1" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T1" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T2" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T2" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T3" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T3" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T4" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T4" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T5" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T5" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T6" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T6" CHANGED_BY="USER" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_smc_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_sram_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_sram" IS_ENABLE="pcw_nor_grp_sram_cs1_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE4000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE5FFFFFF" />
        <PARAMETER NAME="C_SRAM_CLK_FREQ_HZ" VALUE="2" PARAM="pcw_act_smc_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
        <PARAMETER NAME="C_SRAM_CYCLE_T0" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T0" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T1" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T1" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T2" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T2" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T3" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T3" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T4" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T4" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T5" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T5" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T6" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T6" CHANGED_BY="USER" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_smc_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_sram_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_sram" IS_ENABLE="pcw_nor_grp_cs0_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE2000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE3FFFFFF" />
        <PARAMETER NAME="C_SRAM_CLK_FREQ_HZ" VALUE="2" PARAM="pcw_act_smc_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
        <PARAMETER NAME="C_SRAM_CYCLE_T0" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T0" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T1" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T1" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T2" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T2" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T3" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T3" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T4" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T4" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T5" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T5" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T6" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE0_T6" CHANGED_BY="USER" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_smc_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_sram_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_sram" IS_ENABLE="pcw_nor_grp_cs1_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE4000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE5FFFFFF" />
        <PARAMETER NAME="C_SRAM_CLK_FREQ_HZ" VALUE="2" PARAM="pcw_act_smc_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
        <PARAMETER NAME="C_SRAM_CYCLE_T0" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T0" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T1" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T1" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T2" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T2" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T3" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T3" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T4" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T4" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T5" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T5" CHANGED_BY="USER" />
        <PARAMETER NAME="C_SRAM_CYCLE_T6" VALUE="2" PARAM="PCW_SMC_SRAM_CYCLE1_T6" CHANGED_BY="USER" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_smc_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_trace_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_trace" IS_ENABLE="pcw_trace_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_TRACE_WIDTH" VALUE="32" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_axi_interconnect_0" IPTYPE="BUS" MODTYPE="ps7_axi_interconnect" MODCLASS="BUS">
      <PARAMETERS>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI_CTRL" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="" CONNBUS="" >
          <PORT NAME="S_AXI_CTRL_ACLK"/>
          <PORT NAME="S_AXI_CTRL_ARESETN"/>
          <PORT NAME="S_AXI_CTRL_AWADDR"/>
          <PORT NAME="S_AXI_CTRL_AWVALID"/>
          <PORT NAME="S_AXI_CTRL_AWREADY"/>
          <PORT NAME="S_AXI_CTRL_WDATA"/>
          <PORT NAME="S_AXI_CTRL_WSTRB"/>
          <PORT NAME="S_AXI_CTRL_WVALID"/>
          <PORT NAME="S_AXI_CTRL_WREADY"/>
          <PORT NAME="S_AXI_CTRL_BRESP"/>
          <PORT NAME="S_AXI_CTRL_BVALID"/>
          <PORT NAME="S_AXI_CTRL_BREADY"/>
          <PORT NAME="S_AXI_CTRL_ARADDR"/>
          <PORT NAME="S_AXI_CTRL_ARVALID"/>
          <PORT NAME="S_AXI_CTRL_ARREADY"/>
          <PORT NAME="S_AXI_CTRL_RDATA"/>
          <PORT NAME="S_AXI_CTRL_RRESP"/>
          <PORT NAME="S_AXI_CTRL_RVALID"/>
          <PORT NAME="S_AXI_CTRL_RREADY"/>
        </BUS>  
        <BUS NAME="S_AXI_GP0" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_top" CONNBUS="" >
          <PORT NAME="S_AXI_GP0_ACLK"/>
          <PORT NAME="S_AXI_GP0_ARESETN"/>
          <PORT NAME="S_AXI_GP0_AWADDR"/>
          <PORT NAME="S_AXI_GP0_AWVALID"/>
          <PORT NAME="S_AXI_GP0_AWREADY"/>
          <PORT NAME="S_AXI_GP0_WDATA"/>
          <PORT NAME="S_AXI_GP0_WSTRB"/>
          <PORT NAME="S_AXI_GP0_WVALID"/>
          <PORT NAME="S_AXI_GP0_WREADY"/>
          <PORT NAME="S_AXI_GP0_BRESP"/>
          <PORT NAME="S_AXI_GP0_BVALID"/>
          <PORT NAME="S_AXI_GP0_BREADY"/>
          <PORT NAME="S_AXI_GP0_ARADDR"/>
          <PORT NAME="S_AXI_GP0_ARVALID"/>
          <PORT NAME="S_AXI_GP0_ARREADY"/>
          <PORT NAME="S_AXI_GP0_RDATA"/>
          <PORT NAME="S_AXI_GP0_RRESP"/>
          <PORT NAME="S_AXI_GP0_RVALID"/>
          <PORT NAME="S_AXI_GP0_RREADY"/>
        </BUS>  
        <BUS NAME="S_AXI_GP1" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_top" CONNBUS="" >
          <PORT NAME="S_AXI_GP1_ACLK"/>
          <PORT NAME="S_AXI_GP1_ARESETN"/>
          <PORT NAME="S_AXI_GP1_AWADDR"/>
          <PORT NAME="S_AXI_GP1_AWVALID"/>
          <PORT NAME="S_AXI_GP1_AWREADY"/>
          <PORT NAME="S_AXI_GP1_WDATA"/>
          <PORT NAME="S_AXI_GP1_WSTRB"/>
          <PORT NAME="S_AXI_GP1_WVALID"/>
          <PORT NAME="S_AXI_GP1_WREADY"/>
          <PORT NAME="S_AXI_GP1_BRESP"/>
          <PORT NAME="S_AXI_GP1_BVALID"/>
          <PORT NAME="S_AXI_GP1_BREADY"/>
          <PORT NAME="S_AXI_GP1_ARADDR"/>
          <PORT NAME="S_AXI_GP1_ARVALID"/>
          <PORT NAME="S_AXI_GP1_ARREADY"/>
          <PORT NAME="S_AXI_GP1_RDATA"/>
          <PORT NAME="S_AXI_GP1_RRESP"/>
          <PORT NAME="S_AXI_GP1_RVALID"/>
          <PORT NAME="S_AXI_GP1_RREADY"/>
        </BUS>  
        <BUS NAME="S_AXI_HP0" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_top" CONNBUS="" >
          <PORT NAME="S_AXI_HP0_ACLK"/>
          <PORT NAME="S_AXI_HP0_ARESETN"/>
          <PORT NAME="S_AXI_HP0_AWADDR"/>
          <PORT NAME="S_AXI_HP0_AWVALID"/>
          <PORT NAME="S_AXI_HP0_AWREADY"/>
          <PORT NAME="S_AXI_HP0_WDATA"/>
          <PORT NAME="S_AXI_HP0_WSTRB"/>
          <PORT NAME="S_AXI_HP0_WVALID"/>
          <PORT NAME="S_AXI_HP0_WREADY"/>
          <PORT NAME="S_AXI_HP0_BRESP"/>
          <PORT NAME="S_AXI_HP0_BVALID"/>
          <PORT NAME="S_AXI_HP0_BREADY"/>
          <PORT NAME="S_AXI_HP0_ARADDR"/>
          <PORT NAME="S_AXI_HP0_ARVALID"/>
          <PORT NAME="S_AXI_HP0_ARREADY"/>
          <PORT NAME="S_AXI_HP0_RDATA"/>
          <PORT NAME="S_AXI_HP0_RRESP"/>
          <PORT NAME="S_AXI_HP0_RVALID"/>
          <PORT NAME="S_AXI_HP0_RREADY"/>
        </BUS>  
        <BUS NAME="S_AXI_HP1" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_top" CONNBUS="" >
          <PORT NAME="S_AXI_HP1_ACLK"/>
          <PORT NAME="S_AXI_HP1_ARESETN"/>
          <PORT NAME="S_AXI_HP1_AWADDR"/>
          <PORT NAME="S_AXI_HP1_AWVALID"/>
          <PORT NAME="S_AXI_HP1_AWREADY"/>
          <PORT NAME="S_AXI_HP1_WDATA"/>
          <PORT NAME="S_AXI_HP1_WSTRB"/>
          <PORT NAME="S_AXI_HP1_WVALID"/>
          <PORT NAME="S_AXI_HP1_WREADY"/>
          <PORT NAME="S_AXI_HP1_BRESP"/>
          <PORT NAME="S_AXI_HP1_BVALID"/>
          <PORT NAME="S_AXI_HP1_BREADY"/>
          <PORT NAME="S_AXI_HP1_ARADDR"/>
          <PORT NAME="S_AXI_HP1_ARVALID"/>
          <PORT NAME="S_AXI_HP1_ARREADY"/>
          <PORT NAME="S_AXI_HP1_RDATA"/>
          <PORT NAME="S_AXI_HP1_RRESP"/>
          <PORT NAME="S_AXI_HP1_RVALID"/>
          <PORT NAME="S_AXI_HP1_RREADY"/>
        </BUS>  
        <BUS NAME="S_AXI_HP2" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_top" CONNBUS="" >
          <PORT NAME="S_AXI_HP2_ACLK"/>
          <PORT NAME="S_AXI_HP2_ARESETN"/>
          <PORT NAME="S_AXI_HP2_AWADDR"/>
          <PORT NAME="S_AXI_HP2_AWVALID"/>
          <PORT NAME="S_AXI_HP2_AWREADY"/>
          <PORT NAME="S_AXI_HP2_WDATA"/>
          <PORT NAME="S_AXI_HP2_WSTRB"/>
          <PORT NAME="S_AXI_HP2_WVALID"/>
          <PORT NAME="S_AXI_HP2_WREADY"/>
          <PORT NAME="S_AXI_HP2_BRESP"/>
          <PORT NAME="S_AXI_HP2_BVALID"/>
          <PORT NAME="S_AXI_HP2_BREADY"/>
          <PORT NAME="S_AXI_HP2_ARADDR"/>
          <PORT NAME="S_AXI_HP2_ARVALID"/>
          <PORT NAME="S_AXI_HP2_ARREADY"/>
          <PORT NAME="S_AXI_HP2_RDATA"/>
          <PORT NAME="S_AXI_HP2_RRESP"/>
          <PORT NAME="S_AXI_HP2_RVALID"/>
          <PORT NAME="S_AXI_HP2_RREADY"/>
        </BUS>  
        <BUS NAME="S_AXI_HP3" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_top" CONNBUS="" >
          <PORT NAME="S_AXI_HP3_ACLK"/>
          <PORT NAME="S_AXI_HP3_ARESETN"/>
          <PORT NAME="S_AXI_HP3_AWADDR"/>
          <PORT NAME="S_AXI_HP3_AWVALID"/>
          <PORT NAME="S_AXI_HP3_AWREADY"/>
          <PORT NAME="S_AXI_HP3_WDATA"/>
          <PORT NAME="S_AXI_HP3_WSTRB"/>
          <PORT NAME="S_AXI_HP3_WVALID"/>
          <PORT NAME="S_AXI_HP3_WREADY"/>
          <PORT NAME="S_AXI_HP3_BRESP"/>
          <PORT NAME="S_AXI_HP3_BVALID"/>
          <PORT NAME="S_AXI_HP3_BREADY"/>
          <PORT NAME="S_AXI_HP3_ARADDR"/>
          <PORT NAME="S_AXI_HP3_ARVALID"/>
          <PORT NAME="S_AXI_HP3_ARREADY"/>
          <PORT NAME="S_AXI_HP3_RDATA"/>
          <PORT NAME="S_AXI_HP3_RRESP"/>
          <PORT NAME="S_AXI_HP3_RVALID"/>
          <PORT NAME="S_AXI_HP3_RREADY"/>
        </BUS>  
        <BUS NAME="M_AXI" PROTOCOL="AXI" TYPE="MASTER" CONNECTION="" CONNBUS="" >
            <PORT NAME="M_AXI_ARESETN"/> 
            <PORT NAME="M_AXI_ARVALID"/>
            <PORT NAME="M_AXI_AWVALID"/>
            <PORT NAME="M_AXI_BREADY"/>
            <PORT NAME="M_AXI_RREADY"/>
            <PORT NAME="M_AXI_WLAST"/>
            <PORT NAME="M_AXI_WVALID"/>
            <PORT NAME="M_AXI_ARID"/>
            <PORT NAME="M_AXI_AWID"/>
            <PORT NAME="M_AXI_WID"/> 
            <PORT NAME="M_AXI_ARBURST"/>
            <PORT NAME="M_AXI_ARLOCK"/>
            <PORT NAME="M_AXI_ARSIZE"/>
            <PORT NAME="M_AXI_AWBURST"/>
            <PORT NAME="M_AXI_AWLOCK"/> 
            <PORT NAME="M_AXI_AWSIZE"/>
            <PORT NAME="M_AXI_ARPROT"/>
            <PORT NAME="M_AXI_AWPROT"/>
            <PORT NAME="M_AXI_ARADDR"/>
            <PORT NAME="M_AXI_AWADDR"/>
            <PORT NAME="M_AXI_WDATA"/>
            <PORT NAME="M_AXI_ARCACHE"/>
            <PORT NAME="M_AXI_ARLEN"/> 
            <PORT NAME="M_AXI_ARQOS"/> 
            <PORT NAME="M_AXI_AWCACHE"/>
            <PORT NAME="M_AXI_AWLEN"/> 
            <PORT NAME="M_AXI_AWQOS"/>
            <PORT NAME="M_AXI_WSTRB"/> 
            <PORT NAME="M_AXI_ACLK"/> 
            <PORT NAME="M_AXI_ARREADY"/> 
            <PORT NAME="M_AXI_AWREADY"/> 
            <PORT NAME="M_AXI_BVALID"/> 
            <PORT NAME="M_AXI_RLAST"/> 
            <PORT NAME="M_AXI_RVALID"/>
            <PORT NAME="M_AXI_WREADY"/>
            <PORT NAME="M_AXI_BID"/> 
            <PORT NAME="M_AXI_RID"/> 
            <PORT NAME="M_AXI_BRESP"/>
            <PORT NAME="M_AXI_RRESP"/>
            <PORT NAME="M_AXI_RDATA"/>
        </BUS>  

        <BUS NAME="M_AXI_GP0" PROTOCOL="AXI" TYPE="MASTER" CONNECTION="ps7_top" CONNBUS="" >
            <PORT NAME="M_AXI_GP0_ARESETN"/> 
            <PORT NAME="M_AXI_GP0_ARVALID"/>
            <PORT NAME="M_AXI_GP0_AWVALID"/>
            <PORT NAME="M_AXI_GP0_BREADY"/>
            <PORT NAME="M_AXI_GP0_RREADY"/>
            <PORT NAME="M_AXI_GP0_WLAST"/>
            <PORT NAME="M_AXI_GP0_WVALID"/>
            <PORT NAME="M_AXI_GP0_ARID"/>
            <PORT NAME="M_AXI_GP0_AWID"/>
            <PORT NAME="M_AXI_GP0_WID"/> 
            <PORT NAME="M_AXI_GP0_ARBURST"/>
            <PORT NAME="M_AXI_GP0_ARLOCK"/>
            <PORT NAME="M_AXI_GP0_ARSIZE"/>
            <PORT NAME="M_AXI_GP0_AWBURST"/>
            <PORT NAME="M_AXI_GP0_AWLOCK"/> 
            <PORT NAME="M_AXI_GP0_AWSIZE"/>
            <PORT NAME="M_AXI_GP0_ARPROT"/>
            <PORT NAME="M_AXI_GP0_AWPROT"/>
            <PORT NAME="M_AXI_GP0_ARADDR"/>
            <PORT NAME="M_AXI_GP0_AWADDR"/>
            <PORT NAME="M_AXI_GP0_WDATA"/>
            <PORT NAME="M_AXI_GP0_ARCACHE"/>
            <PORT NAME="M_AXI_GP0_ARLEN"/> 
            <PORT NAME="M_AXI_GP0_ARQOS"/> 
            <PORT NAME="M_AXI_GP0_AWCACHE"/>
            <PORT NAME="M_AXI_GP0_AWLEN"/> 
            <PORT NAME="M_AXI_GP0_AWQOS"/>
            <PORT NAME="M_AXI_GP0_WSTRB"/> 
            <PORT NAME="M_AXI_GP0_ACLK"/> 
            <PORT NAME="M_AXI_GP0_ARREADY"/> 
            <PORT NAME="M_AXI_GP0_AWREADY"/> 
            <PORT NAME="M_AXI_GP0_BVALID"/> 
            <PORT NAME="M_AXI_GP0_RLAST"/> 
            <PORT NAME="M_AXI_GP0_RVALID"/>
            <PORT NAME="M_AXI_GP0_WREADY"/>
            <PORT NAME="M_AXI_GP0_BID"/> 
            <PORT NAME="M_AXI_GP0_RID"/> 
            <PORT NAME="M_AXI_GP0_BRESP"/>
            <PORT NAME="M_AXI_GP0_RRESP"/>
            <PORT NAME="M_AXI_GP0_RDATA"/>
        </BUS>  
        <BUS NAME="M_AXI_GP1" PROTOCOL="AXI" TYPE="MASTER" CONNECTION="ps7_top" CONNBUS="" >
            <PORT NAME="M_AXI_GP1_ARESETN"/> 
            <PORT NAME="M_AXI_GP1_ARVALID"/>
            <PORT NAME="M_AXI_GP1_AWVALID"/>
            <PORT NAME="M_AXI_GP1_BREADY"/>
            <PORT NAME="M_AXI_GP1_RREADY"/>
            <PORT NAME="M_AXI_GP1_WLAST"/>
            <PORT NAME="M_AXI_GP1_WVALID"/>
            <PORT NAME="M_AXI_GP1_ARID"/>
            <PORT NAME="M_AXI_GP1_AWID"/>
            <PORT NAME="M_AXI_GP1_WID"/> 
            <PORT NAME="M_AXI_GP1_ARBURST"/>
            <PORT NAME="M_AXI_GP1_ARLOCK"/>
            <PORT NAME="M_AXI_GP1_ARSIZE"/>
            <PORT NAME="M_AXI_GP1_AWBURST"/>
            <PORT NAME="M_AXI_GP1_AWLOCK"/> 
            <PORT NAME="M_AXI_GP1_AWSIZE"/>
            <PORT NAME="M_AXI_GP1_ARPROT"/>
            <PORT NAME="M_AXI_GP1_AWPROT"/>
            <PORT NAME="M_AXI_GP1_ARADDR"/>
            <PORT NAME="M_AXI_GP1_AWADDR"/>
            <PORT NAME="M_AXI_GP1_WDATA"/>
            <PORT NAME="M_AXI_GP1_ARCACHE"/>
            <PORT NAME="M_AXI_GP1_ARLEN"/> 
            <PORT NAME="M_AXI_GP1_ARQOS"/> 
            <PORT NAME="M_AXI_GP1_AWCACHE"/>
            <PORT NAME="M_AXI_GP1_AWLEN"/> 
            <PORT NAME="M_AXI_GP1_AWQOS"/>
            <PORT NAME="M_AXI_GP1_WSTRB"/> 
            <PORT NAME="M_AXI_GP1_ACLK"/> 
            <PORT NAME="M_AXI_GP1_ARREADY"/> 
            <PORT NAME="M_AXI_GP1_AWREADY"/> 
            <PORT NAME="M_AXI_GP1_BVALID"/> 
            <PORT NAME="M_AXI_GP1_RLAST"/> 
            <PORT NAME="M_AXI_GP1_RVALID"/>
            <PORT NAME="M_AXI_GP1_WREADY"/>
            <PORT NAME="M_AXI_GP1_BID"/> 
            <PORT NAME="M_AXI_GP1_RID"/> 
            <PORT NAME="M_AXI_GP1_BRESP"/>
            <PORT NAME="M_AXI_GP1_RRESP"/>
            <PORT NAME="M_AXI_GP1_RDATA"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="M_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_ACLK" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_ACLK" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_ACLK" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_ACLK" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_ACLK" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_ACLK" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_ACLK" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_ACLK" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ACLK" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_ACLK" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_ACLK" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_ACLK" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_ACLK" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_ACLK" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_ACLK" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_ACLK" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_ACLK" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_ACLK" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_ACLK" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_ACLK" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_ACLK" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_ACLK" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_ACLK" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_ACLK" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_ACLK" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ACLK" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_ACLK" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_ACLK" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_ACLK" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_ARESETN" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_ARESETN" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_ARESETN" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_ARESETN" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_ARESETN" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_ARESETN" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_ARESETN" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_ARESETN" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARESETN" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_ARESETN" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_ARESETN" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_ARESETN" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_ARESETN" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_ARESETN" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_ARESETN" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_ARESETN" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_ARESETN" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_ARESETN" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_ARESETN" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_ARESETN" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_ARESETN" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_ARESETN" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_ARESETN" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_ARESETN" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_ARESETN" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARESETN" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_ARESETN" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_ARESETN" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_ARESETN" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_ARESETN"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_AWADDR" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_AWADDR" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_AWADDR" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_AWADDR" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_AWADDR" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_AWADDR" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_AWADDR" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_AWADDR" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_AWADDR" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_AWADDR" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_AWADDR" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_AWADDR" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_AWADDR" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_AWADDR" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_AWADDR" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_AWADDR" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_AWADDR" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_AWADDR" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_AWADDR" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_AWADDR" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_AWADDR" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_AWADDR" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_AWADDR" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_AWADDR" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_AWADDR" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_AWADDR" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_AWADDR" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_AWADDR" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_AWADDR" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_AWADDR"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_AWVALID" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_AWVALID" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_AWVALID" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_AWVALID" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_AWVALID" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_AWVALID" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_AWVALID" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_AWVALID" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_AWVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_AWVALID" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_AWVALID" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_AWVALID" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_AWVALID" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_AWVALID" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_AWVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_AWVALID" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_AWVALID" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_AWVALID" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_AWVALID" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_AWVALID" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_AWVALID" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_AWVALID" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_AWVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_AWVALID" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_AWVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_AWVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_AWVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_AWVALID" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_AWVALID" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_AWVALID"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_AWREADY" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_AWREADY" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_AWREADY" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_AWREADY" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_AWREADY" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_AWREADY" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_AWREADY" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_AWREADY" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_AWREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_AWREADY" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_AWREADY" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_AWREADY" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_AWREADY" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_AWREADY" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_AWREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_AWREADY" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_AWREADY" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_AWREADY" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_AWREADY" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_AWREADY" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_AWREADY" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_AWREADY" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_AWREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_AWREADY" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_AWREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_AWREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_AWREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_AWREADY" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_AWREADY" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_AWREADY"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_WDATA" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_WDATA" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_WDATA" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_WDATA" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_WDATA" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_WDATA" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_WDATA" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_WDATA" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WDATA" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_WDATA" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_WDATA" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_WDATA" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_WDATA" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_WDATA" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_WDATA" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_WDATA" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_WDATA" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_WDATA" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_WDATA" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_WDATA" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_WDATA" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_WDATA" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_WDATA" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_WDATA" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_WDATA" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WDATA" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_WDATA" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_WDATA" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_WDATA" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_WDATA"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_WSTRB" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_WSTRB" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_WSTRB" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_WSTRB" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_WSTRB" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_WSTRB" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_WSTRB" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_WSTRB" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WSTRB" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_WSTRB" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_WSTRB" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_WSTRB" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_WSTRB" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_WSTRB" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_WSTRB" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_WSTRB" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_WSTRB" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_WSTRB" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_WSTRB" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_WSTRB" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_WSTRB" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_WSTRB" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_WSTRB" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_WSTRB" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_WSTRB" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WSTRB" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_WSTRB" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_WSTRB" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_WSTRB" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_WSTRB"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_WVALID" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_WVALID" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_WVALID" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_WVALID" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_WVALID" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_WVALID" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_WVALID" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_WVALID" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_WVALID" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_WVALID" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_WVALID" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_WVALID" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_WVALID" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_WVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_WVALID" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_WVALID" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_WVALID" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_WVALID" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_WVALID" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_WVALID" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_WVALID" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_WVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_WVALID" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_WVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_WVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_WVALID" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_WVALID" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_WVALID"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_WREADY" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_WREADY" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_WREADY" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_WREADY" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_WREADY" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_WREADY" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_WREADY" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_WREADY" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_WREADY" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_WREADY" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_WREADY" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_WREADY" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_WREADY" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_WREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_WREADY" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_WREADY" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_WREADY" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_WREADY" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_WREADY" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_WREADY" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_WREADY" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_WREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_WREADY" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_WREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_WREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_WREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_WREADY" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_WREADY" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_WREADY"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_BRESP" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_BRESP" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_BRESP" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_BRESP" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_BRESP" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_BRESP" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_BRESP" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_BRESP" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_BRESP" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_BRESP" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_BRESP" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_BRESP" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_BRESP" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_BRESP" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_BRESP" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_BRESP" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_BRESP" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_BRESP" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_BRESP" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_BRESP" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_BRESP" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_BRESP" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_BRESP" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_BRESP" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_BRESP" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_BRESP" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_BRESP" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_BRESP" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_BRESP" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_BRESP"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_BVALID" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_BVALID" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_BVALID" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_BVALID" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_BVALID" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_BVALID" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_BVALID" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_BVALID" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_BVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_BVALID" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_BVALID" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_BVALID" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_BVALID" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_BVALID" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_BVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_BVALID" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_BVALID" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_BVALID" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_BVALID" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_BVALID" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_BVALID" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_BVALID" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_BVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_BVALID" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_BVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_BVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_BVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_BVALID" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_BVALID" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_BVALID"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_BREADY" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_BREADY" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_BREADY" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_BREADY" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_BREADY" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_BREADY" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_BREADY" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_BREADY" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_BREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_BREADY" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_BREADY" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_BREADY" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_BREADY" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_BREADY" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_BREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_BREADY" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_BREADY" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_BREADY" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_BREADY" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_BREADY" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_BREADY" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_BREADY" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_BREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_BREADY" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_BREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_BREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_BREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_BREADY" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_BREADY" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_BREADY"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_ARADDR" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_ARADDR" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_ARADDR" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_ARADDR" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_ARADDR" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_ARADDR" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_ARADDR" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_ARADDR" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARADDR" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_ARADDR" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_ARADDR" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_ARADDR" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_ARADDR" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_ARADDR" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_ARADDR" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_ARADDR" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_ARADDR" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_ARADDR" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_ARADDR" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_ARADDR" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_ARADDR" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_ARADDR" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_ARADDR" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_ARADDR" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_ARADDR" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARADDR" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_ARADDR" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_ARADDR" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_ARADDR" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_ARADDR"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_ARVALID" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_ARVALID" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_ARVALID" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_ARVALID" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_ARVALID" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_ARVALID" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_ARVALID" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_ARVALID" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_ARVALID" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_ARVALID" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_ARVALID" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_ARVALID" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_ARVALID" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_ARVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_ARVALID" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_ARVALID" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_ARVALID" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_ARVALID" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_ARVALID" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_ARVALID" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_ARVALID" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_ARVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_ARVALID" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_ARVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_ARVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_ARVALID" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_ARVALID" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_ARVALID"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_ARREADY" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_ARREADY" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_ARREADY" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_ARREADY" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_ARREADY" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_ARREADY" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_ARREADY" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_ARREADY" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_ARREADY" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_ARREADY" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_ARREADY" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_ARREADY" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_ARREADY" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_ARREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_ARREADY" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_ARREADY" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_ARREADY" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_ARREADY" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_ARREADY" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_ARREADY" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_ARREADY" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_ARREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_ARREADY" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_ARREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_ARREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_ARREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_ARREADY" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_ARREADY" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_ARREADY"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_RDATA" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_RDATA" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_RDATA" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_RDATA" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_RDATA" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_RDATA" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_RDATA" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_RDATA" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RDATA" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_RDATA" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_RDATA" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_RDATA" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_RDATA" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_RDATA" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_RDATA" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_RDATA" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_RDATA" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_RDATA" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_RDATA" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_RDATA" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_RDATA" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_RDATA" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_RDATA" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_RDATA" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_RDATA" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RDATA" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_RDATA" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_RDATA" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_RDATA" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_RDATA"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_RRESP" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_RRESP" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_RRESP" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_RRESP" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_RRESP" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_RRESP" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_RRESP" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_RRESP" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RRESP" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_RRESP" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_RRESP" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_RRESP" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_RRESP" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_RRESP" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_RRESP" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_RRESP" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_RRESP" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_RRESP" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_RRESP" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_RRESP" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_RRESP" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_RRESP" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_RRESP" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_RRESP" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_RRESP" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RRESP" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_RRESP" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_RRESP" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_RRESP" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_RRESP"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_RVALID" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_RVALID" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_RVALID" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_RVALID" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_RVALID" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_RVALID" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_RVALID" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_RVALID" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_RVALID" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_RVALID" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_RVALID" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_RVALID" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_RVALID" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_RVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_RVALID" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_RVALID" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_RVALID" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_RVALID" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_RVALID" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_RVALID" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_RVALID" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_RVALID" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_RVALID" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_RVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RVALID" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_RVALID" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_RVALID" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_RVALID" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_RVALID"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_uart_0" PORT="S_AXI_RREADY" PARAM="pcw_uart0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_uart_1" PORT="S_AXI_RREADY" PARAM="pcw_uart1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_0" PORT="S_AXI_RREADY" PARAM="pcw_usb0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_usb_1" PORT="S_AXI_RREADY" PARAM="pcw_usb1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_0" PORT="S_AXI_RREADY" PARAM="pcw_spi0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_spi_1" PORT="S_AXI_RREADY" PARAM="pcw_spi1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_0" PORT="S_AXI_RREADY" PARAM="pcw_can0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_can_1" PORT="S_AXI_RREADY" PARAM="pcw_can1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="S_AXI_RREADY" PARAM="pcw_enet0_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="S_AXI_RREADY" PARAM="pcw_enet1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_0" PORT="S_AXI_RREADY" PARAM="pcw_sd0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_sd_1" PORT="S_AXI_RREADY" PARAM="pcw_sd1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_smcc_0" PORT="S_AXI_RREADY" PARAM="pcw_smc_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="S_AXI_RREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="S_AXI_RREADY" PARAM="pcw_i2c0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="S_AXI_RREADY" PARAM="pcw_i2c1_peripheral_enable"/> 
           <CONNECTION INSTANCE="ps7_sram_0" PORT="S_AXI_RREADY" PARAM="pcw_nor_grp_cs0_enable"/>
           <CONNECTION INSTANCE="ps7_sram_1" PORT="S_AXI_RREADY" PARAM="pcw_nor_grp_cs1_enable"/>
           <CONNECTION INSTANCE="ps7_pjtag_0" PORT="S_AXI_RREADY" PARAM="pcw_pjtag_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_0" PORT="S_AXI_RREADY" PARAM="pcw_ttc0_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ttc_1" PORT="S_AXI_RREADY" PARAM="pcw_ttc1_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_afi_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_afi_1" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_afi_2" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_afi_3" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_qspi_linear_0" PORT="S_AXI_RREADY" PARAM="pcw_qspi_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_wdt_0" PORT="S_AXI_RREADY" PARAM="pcw_wdt_peripheral_enable"/>
           <CONNECTION INSTANCE="ps7_ddr_0" PORT="S_AXI_RREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="S_AXI_RREADY" PARAM="pcw_gpio_peripheral_valid"/>
           <CONNECTION INSTANCE="ps7_ddrc_0" PORT="S_AXI_RREADY" PARAM="pcw_uiparam_ddr_enable"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp0" PORT="S_AXI_RREADY" PARAM="pcw_use_m_axi_gp0"/>
           <CONNECTION INSTANCE="ps7_m_axi_gp1" PORT="S_AXI_RREADY" PARAM="pcw_use_m_axi_gp1"/>
           <CONNECTION INSTANCE="ps7_dev_cfg_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_xadc_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_coresight_comp_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_gpv_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_scuc_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_intc_dist_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="S_AXI_ACLK"/>
           <CONNECTION INSTANCE="ps7_iop_bus_config_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_ram_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_ram_1" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="S_AXI_RREADY"/>
           <CONNECTION INSTANCE="ps7_slcr_0" PORT="S_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="5.2" INSTANCE="ps7_cortexa9_0" IPTYPE="PROCESSOR" MODCLASS="PROCESSOR" MODTYPE="ps7_cortexa9">
      <PARAMETERS>
        <PARAMETER NAME="C_CPU_CLK_FREQ_HZ" VALUE="800000000" PARAM="pcw_act_apu_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_CPU_1X_CLK_FREQ_HZ" VALUE="133000000" PARAM="pcw_apu_1x_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="D-CACHE-LINE-SIZE" VALUE="20" />
        <PARAMETER NAME="D-CACHE-SIZE" VALUE="0x8000" />
        <PARAMETER NAME="I-CACHE-LINE-SIZE" VALUE="20" />
        <PARAMETER NAME="I-CACHE-SIZE" VALUE="0x8000" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="M_AXI_DP" PROTOCOL="AXI" TYPE="MASTER" CONNECTION="ps7_axi_interconnect_0" CONNBUS="S_AXI_CTRL" >
            <PORT NAME="M_AXI_DP_ARESETN"/> 
            <PORT NAME="M_AXI_DP_ARVALID"/>
            <PORT NAME="M_AXI_DP_AWVALID"/>
            <PORT NAME="M_AXI_DP_BREADY"/>
            <PORT NAME="M_AXI_DP_RREADY"/>
            <PORT NAME="M_AXI_DP_WLAST"/>
            <PORT NAME="M_AXI_DP_WVALID"/>
            <PORT NAME="M_AXI_DP_ARID"/>
            <PORT NAME="M_AXI_DP_AWID"/>
            <PORT NAME="M_AXI_DP_WID"/> 
            <PORT NAME="M_AXI_DP_ARBURST"/>
            <PORT NAME="M_AXI_DP_ARLOCK"/>
            <PORT NAME="M_AXI_DP_ARSIZE"/>
            <PORT NAME="M_AXI_DP_AWBURST"/>
            <PORT NAME="M_AXI_DP_AWLOCK"/> 
            <PORT NAME="M_AXI_DP_AWSIZE"/>
            <PORT NAME="M_AXI_DP_ARPROT"/>
            <PORT NAME="M_AXI_DP_AWPROT"/>
            <PORT NAME="M_AXI_DP_ARADDR"/>
            <PORT NAME="M_AXI_DP_AWADDR"/>
            <PORT NAME="M_AXI_DP_WDATA"/>
            <PORT NAME="M_AXI_DP_ARCACHE"/>
            <PORT NAME="M_AXI_DP_ARLEN"/> 
            <PORT NAME="M_AXI_DP_ARQOS"/> 
            <PORT NAME="M_AXI_DP_AWCACHE"/>
            <PORT NAME="M_AXI_DP_AWLEN"/> 
            <PORT NAME="M_AXI_DP_AWQOS"/>
            <PORT NAME="M_AXI_DP_WSTRB"/> 
            <PORT NAME="M_AXI_DP_ACLK"/> 
            <PORT NAME="M_AXI_DP_ARREADY"/> 
            <PORT NAME="M_AXI_DP_AWREADY"/> 
            <PORT NAME="M_AXI_DP_BVALID"/> 
            <PORT NAME="M_AXI_DP_RLAST"/> 
            <PORT NAME="M_AXI_DP_RVALID"/>
            <PORT NAME="M_AXI_DP_WREADY"/>
            <PORT NAME="M_AXI_DP_BID"/> 
            <PORT NAME="M_AXI_DP_RID"/> 
            <PORT NAME="M_AXI_DP_BRESP"/>
            <PORT NAME="M_AXI_DP_RRESP"/>
            <PORT NAME="M_AXI_DP_RDATA"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="M_AXI_DP_ACLK" CLKFREQUENCY="pcw_act_apu_peripheral_freqmhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RREADY"/>
         </PORT>
      </PORTS>
      <MEMORYMAP>
        <MEMRANGE BASEDECIMAL="3758100480" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0000000" HIGHDECIMAL="3758104575" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0000FFF" INSTANCE="ps7_uart_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_uart0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758100480" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0001000" HIGHDECIMAL="3758104575" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0001FFF" INSTANCE="ps7_uart_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_uart1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0004000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0004FFF" INSTANCE="ps7_i2c_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_i2c0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0005000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0005FFF" INSTANCE="ps7_i2c_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_i2c1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0008000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0008FFF" INSTANCE="ps7_can_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_can0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0009000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0009FFF" INSTANCE="ps7_can_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_can1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0006000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0006FFF" INSTANCE="ps7_spi_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_spi0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0007000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0007FFF" INSTANCE="ps7_spi_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_spi1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0100000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0100FFF" INSTANCE="ps7_sd_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_sd0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0101000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0101FFF" INSTANCE="ps7_sd_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_sd1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8001000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8001FFF" INSTANCE="ps7_ttc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_ttc0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8002000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8002FFF" INSTANCE="ps7_ttc_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_ttc1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8005000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8005FFF" INSTANCE="ps7_wdt_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_wdt_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758141440" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000B000" HIGHDECIMAL="3758145535" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000BFFF" INSTANCE="ps7_ethernet_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_enet0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758141440" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000C000" HIGHDECIMAL="3758145535" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000CFFF" INSTANCE="ps7_ethernet_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_enet1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758104576" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0002000" HIGHDECIMAL="3758108671" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0002FFF" INSTANCE="ps7_usb_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_usb0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758104576" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0003000" HIGHDECIMAL="3758108671" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0003FFF" INSTANCE="ps7_usb_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_usb1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758149632" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000D000" HIGHDECIMAL="3758153727" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000DFFF" INSTANCE="ps7_qspi_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_qspi_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4227858432" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xFC000000" HIGHDECIMAL="4244635647" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xFCFFFFFF" HIGHVALUEDYNAMIC="pcw_qspi_internal_highaddress" INSTANCE="ps7_qspi_linear_0" IS_DATA="FALSE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="16777216" SIZEABRV="16M" PARAM="pcw_qspi_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758149632" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE1000000" HIGHDECIMAL="3758153727" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE1FFFFFF" INSTANCE="ps7_nand_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="16M" PARAM="pcw_nand_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758153728" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000E000" HIGHDECIMAL="3758157823" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000EFFF" INSTANCE="ps7_smcc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_smc_peripheral_valid">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0x7FFFFFFF" INSTANCE="ps7_m_axi_gp0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_use_m_axi_gp0" IS_HIDDEN="true">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xBFFFFFFF" INSTANCE="ps7_m_axi_gp1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_use_m_axi_gp1" IS_HIDDEN="true">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE2000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE3FFFFFF" INSTANCE="ps7_sram_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_cs0_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3825205248" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE4000000" HIGHDECIMAL="3825209343" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE5FFFFFF" INSTANCE="ps7_sram_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_cs1_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE2000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE3FFFFFF" INSTANCE="ps7_sram_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_sram_cs0_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3825205248" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE4000000" HIGHDECIMAL="3825209343" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE5FFFFFF" INSTANCE="ps7_sram_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_sram_cs1_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758149632" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE1000000" HIGHDECIMAL="3758153727" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE1000FFF" INSTANCE="ps7_trace_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_trace_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160782336" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8008000" HIGHDECIMAL="4160786431" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8008FFF" INSTANCE="ps7_afi_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160786432" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8009000" HIGHDECIMAL="4160790527" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8009FFF" INSTANCE="ps7_afi_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160790528" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF800A000" HIGHDECIMAL="4160794623" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF800AFFF" INSTANCE="ps7_afi_2" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160794624" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF800B000" HIGHDECIMAL="4160798719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF800BFFF" INSTANCE="ps7_afi_3" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="1048576" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x00100000" HIGHDECIMAL="536870911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0x1FFFFFFF" HIGHVALUEDYNAMIC="pcw_ddr_ram_highaddr" INSTANCE="ps7_ddr_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="535822336" SIZEABRV="U" PARAM="pcw_uiparam_ddr_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758137344" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000A000" HIGHDECIMAL="3758141439" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000AFFF" INSTANCE="ps7_gpio_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_gpio_peripheral_valid">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160774144" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8006000" HIGHDECIMAL="4160778239" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8006FFF" INSTANCE="ps7_ddrc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_uiparam_ddr_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160778240" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8007000" HIGHDECIMAL="4160778495" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF80070FF" INSTANCE="ps7_dev_cfg_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160778496" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8007100" HIGHDECIMAL="4160778528" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8007120" INSTANCE="ps7_xadc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160798720" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF800C000" HIGHDECIMAL="4160802815" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF800CFFF" INSTANCE="ps7_ocmc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8800000" HIGHDECIMAL="4170186751" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF88FFFFF" INSTANCE="ps7_coresight_comp_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4170186752" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8900000" HIGHDECIMAL="4171235327" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF89FFFFF" INSTANCE="ps7_gpv_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478208" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00000" HIGHDECIMAL="4176478460" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F000FC" INSTANCE="ps7_scuc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478720" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00200" HIGHDECIMAL="4176478975" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F002FF" INSTANCE="ps7_globaltimer_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176482304" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F01000" HIGHDECIMAL="4176486399" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F01FFF" INSTANCE="ps7_intc_dist_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176486400" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F02000" HIGHDECIMAL="4176490495" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F02FFF" INSTANCE="ps7_l2cachec_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160761856" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8003000" HIGHDECIMAL="4160765951" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8003FFF" INSTANCE="ps7_dma_s" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3760193536" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0200000" HIGHDECIMAL="3760197631" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0200FFF" INSTANCE="ps7_iop_bus_config_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="0" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="196607" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0x0002FFFF" INSTANCE="ps7_ram_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="196608" SIZEABRV="U">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4294901760" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xFFFF0000" HIGHDECIMAL="4294966783" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xFFFFFDFF" INSTANCE="ps7_ram_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="65024" SIZEABRV="U">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_PPI_S_AXI_BASEADDR" BASEVALUE="0xF8F01000" HIGHDECIMAL="4176478719" HIGHNAME="C_PPI_S_AXI_HIGHADDR" HIGHVALUE="0xF8F01FFF" INSTANCE="ps7_scugic_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256" MULTIPLE="2">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00100" HIGHDECIMAL="4176478719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F001FF" INSTANCE="ps7_scugic_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F02000" HIGHDECIMAL="4176478719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F02FFF" INSTANCE="ps7_pl310_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8891000" HIGHDECIMAL="4176478719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8891FFF" INSTANCE="ps7_pmu_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_PMU1_S_AXI_BASEADDR" BASEVALUE="0xF8893000" HIGHDECIMAL="4176478719" HIGHNAME="C_PMU1_S_AXI_HIGHADDR" HIGHVALUE="0xF8893FFF" INSTANCE="ps7_pmu_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176479744" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00600" HIGHDECIMAL="4176479775" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F0061F" INSTANCE="ps7_scutimer_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="32" SIZEABRV="32">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176479776" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00620" HIGHDECIMAL="4176479999" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F006FF" INSTANCE="ps7_scuwdt_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="224" SIZEABRV="U">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8000000" HIGHDECIMAL="4160753663" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8000FFF" INSTANCE="ps7_slcr_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160765952" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8004000" HIGHDECIMAL="4160770047" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8004FFF" INSTANCE="ps7_dma_ns" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
      </MEMORYMAP>
    </MODULE>  
    <MODULE HWVERSION="5.2" INSTANCE="ps7_cortexa9_1" IPTYPE="PROCESSOR" MODCLASS="PROCESSOR" MODTYPE="ps7_cortexa9">
      <PARAMETERS>
        <PARAMETER NAME="C_CPU_CLK_FREQ_HZ" VALUE="800000000" PARAM="pcw_act_apu_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_CPU_1X_CLK_FREQ_HZ" VALUE="133000000" PARAM="pcw_apu_1x_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="D-CACHE-LINE-SIZE" VALUE="20" />
        <PARAMETER NAME="D-CACHE-SIZE" VALUE="0x8000" />
        <PARAMETER NAME="I-CACHE-LINE-SIZE" VALUE="20" />
        <PARAMETER NAME="I-CACHE-SIZE" VALUE="0x8000" />
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="M_AXI_DP" PROTOCOL="AXI" TYPE="MASTER" CONNECTION="ps7_axi_interconnect_0" CONNBUS="S_AXI_CTRL" >
            <PORT NAME="M_AXI_DP_ARESETN"/> 
            <PORT NAME="M_AXI_DP_ARVALID"/>
            <PORT NAME="M_AXI_DP_AWVALID"/>
            <PORT NAME="M_AXI_DP_BREADY"/>
            <PORT NAME="M_AXI_DP_RREADY"/>
            <PORT NAME="M_AXI_DP_WLAST"/>
            <PORT NAME="M_AXI_DP_WVALID"/>
            <PORT NAME="M_AXI_DP_ARID"/>
            <PORT NAME="M_AXI_DP_AWID"/>
            <PORT NAME="M_AXI_DP_WID"/> 
            <PORT NAME="M_AXI_DP_ARBURST"/>
            <PORT NAME="M_AXI_DP_ARLOCK"/>
            <PORT NAME="M_AXI_DP_ARSIZE"/>
            <PORT NAME="M_AXI_DP_AWBURST"/>
            <PORT NAME="M_AXI_DP_AWLOCK"/> 
            <PORT NAME="M_AXI_DP_AWSIZE"/>
            <PORT NAME="M_AXI_DP_ARPROT"/>
            <PORT NAME="M_AXI_DP_AWPROT"/>
            <PORT NAME="M_AXI_DP_ARADDR"/>
            <PORT NAME="M_AXI_DP_AWADDR"/>
            <PORT NAME="M_AXI_DP_WDATA"/>
            <PORT NAME="M_AXI_DP_ARCACHE"/>
            <PORT NAME="M_AXI_DP_ARLEN"/> 
            <PORT NAME="M_AXI_DP_ARQOS"/> 
            <PORT NAME="M_AXI_DP_AWCACHE"/>
            <PORT NAME="M_AXI_DP_AWLEN"/> 
            <PORT NAME="M_AXI_DP_AWQOS"/>
            <PORT NAME="M_AXI_DP_WSTRB"/> 
            <PORT NAME="M_AXI_DP_ACLK"/> 
            <PORT NAME="M_AXI_DP_ARREADY"/> 
            <PORT NAME="M_AXI_DP_AWREADY"/> 
            <PORT NAME="M_AXI_DP_BVALID"/> 
            <PORT NAME="M_AXI_DP_RLAST"/> 
            <PORT NAME="M_AXI_DP_RVALID"/>
            <PORT NAME="M_AXI_DP_WREADY"/>
            <PORT NAME="M_AXI_DP_BID"/> 
            <PORT NAME="M_AXI_DP_RID"/> 
            <PORT NAME="M_AXI_DP_BRESP"/>
            <PORT NAME="M_AXI_DP_RRESP"/>
            <PORT NAME="M_AXI_DP_RDATA"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="M_AXI_DP_ACLK" CLKFREQUENCY="pcw_act_apu_peripheral_freqmhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="M_AXI_DP_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="M_AXI_DP_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="S_AXI_CTRL_RREADY"/>
         </PORT>
      </PORTS>
      <MEMORYMAP>
        <MEMRANGE BASEDECIMAL="3758100480" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0000000" HIGHDECIMAL="3758104575" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0000FFF" INSTANCE="ps7_uart_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_uart0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758100480" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0001000" HIGHDECIMAL="3758104575" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0001FFF" INSTANCE="ps7_uart_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_uart1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0004000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0004FFF" INSTANCE="ps7_i2c_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_i2c0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0005000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0005FFF" INSTANCE="ps7_i2c_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_i2c1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0008000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0008FFF" INSTANCE="ps7_can_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_can0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0009000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0009FFF" INSTANCE="ps7_can_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_can1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0006000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0006FFF" INSTANCE="ps7_spi_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_spi0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758112768" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0007000" HIGHDECIMAL="3758116863" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0007FFF" INSTANCE="ps7_spi_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_spi1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0100000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0100FFF" INSTANCE="ps7_sd_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_sd0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0101000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0101FFF" INSTANCE="ps7_sd_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_sd1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8001000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8001FFF" INSTANCE="ps7_ttc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_ttc0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8002000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8002FFF" INSTANCE="ps7_ttc_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_ttc1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3759144960" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8005000" HIGHDECIMAL="3759149055" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8005FFF" INSTANCE="ps7_wdt_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_wdt_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758141440" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000B000" HIGHDECIMAL="3758145535" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000BFFF" INSTANCE="ps7_ethernet_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_enet0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758141440" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000C000" HIGHDECIMAL="3758145535" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000CFFF" INSTANCE="ps7_ethernet_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_enet1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758104576" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0002000" HIGHDECIMAL="3758108671" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0002FFF" INSTANCE="ps7_usb_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_usb0_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758104576" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0003000" HIGHDECIMAL="3758108671" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0003FFF" INSTANCE="ps7_usb_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_usb1_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758149632" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000D000" HIGHDECIMAL="3758153727" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000DFFF" INSTANCE="ps7_qspi_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_qspi_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4227858432" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xFC000000" HIGHDECIMAL="4244635647" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xFCFFFFFF" HIGHVALUEDYNAMIC="pcw_qspi_internal_highaddress" INSTANCE="ps7_qspi_linear_0" IS_DATA="FALSE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="16777216" SIZEABRV="16M" PARAM="pcw_qspi_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758149632" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE1000000" HIGHDECIMAL="3758153727" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE1FFFFFF" INSTANCE="ps7_nand_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="16M" PARAM="pcw_nand_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758153728" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000E000" HIGHDECIMAL="3758157823" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000EFFF" INSTANCE="ps7_smcc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_smc_peripheral_valid">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0x7FFFFFFF" INSTANCE="ps7_m_axi_gp0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_use_m_axi_gp0" IS_HIDDEN="true">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xBFFFFFFF" INSTANCE="ps7_m_axi_gp1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_use_m_axi_gp1" IS_HIDDEN="true">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE2000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE3FFFFFF" INSTANCE="ps7_sram_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_cs0_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3825205248" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE4000000" HIGHDECIMAL="3825209343" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE5FFFFFF" INSTANCE="ps7_sram_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_cs1_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3791650816" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE2000000" HIGHDECIMAL="3791654911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE3FFFFFF" INSTANCE="ps7_sram_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_sram_cs0_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3825205248" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE4000000" HIGHDECIMAL="3825209343" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE5FFFFFF" INSTANCE="ps7_sram_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="32M" PARAM="pcw_nor_grp_sram_cs1_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758149632" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE1000000" HIGHDECIMAL="3758153727" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE1000FFF" INSTANCE="ps7_trace_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_trace_peripheral_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160782336" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8008000" HIGHDECIMAL="4160786431" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8008FFF" INSTANCE="ps7_afi_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160786432" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8009000" HIGHDECIMAL="4160790527" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8009FFF" INSTANCE="ps7_afi_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160790528" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF800A000" HIGHDECIMAL="4160794623" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF800AFFF" INSTANCE="ps7_afi_2" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160794624" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF800B000" HIGHDECIMAL="4160798719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF800BFFF" INSTANCE="ps7_afi_3" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="1048576" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x00100000" HIGHDECIMAL="536870911" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0x1FFFFFFF" HIGHVALUEDYNAMIC="pcw_ddr_ram_highaddr" INSTANCE="ps7_ddr_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="535822336" SIZEABRV="U" PARAM="pcw_uiparam_ddr_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3758137344" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE000A000" HIGHDECIMAL="3758141439" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE000AFFF" INSTANCE="ps7_gpio_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_gpio_peripheral_valid">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160774144" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8006000" HIGHDECIMAL="4160778239" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8006FFF" INSTANCE="ps7_ddrc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K" PARAM="pcw_uiparam_ddr_enable">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160778240" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8007000" HIGHDECIMAL="4160778495" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF80070FF" INSTANCE="ps7_dev_cfg_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160778496" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8007100" HIGHDECIMAL="4160778528" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8007120" INSTANCE="ps7_xadc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160798720" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF800C000" HIGHDECIMAL="4160802815" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF800CFFF" INSTANCE="ps7_ocmc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8800000" HIGHDECIMAL="4170186751" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF88FFFFF" INSTANCE="ps7_coresight_comp_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4170186752" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8900000" HIGHDECIMAL="4171235327" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF89FFFFF" INSTANCE="ps7_gpv_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478208" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00000" HIGHDECIMAL="4176478460" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F000FC" INSTANCE="ps7_scuc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478720" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00200" HIGHDECIMAL="4176478975" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F002FF" INSTANCE="ps7_globaltimer_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176482304" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F01000" HIGHDECIMAL="4176486399" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F01FFF" INSTANCE="ps7_intc_dist_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176486400" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F02000" HIGHDECIMAL="4176490495" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F02FFF" INSTANCE="ps7_l2cachec_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160761856" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8003000" HIGHDECIMAL="4160765951" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8003FFF" INSTANCE="ps7_dma_s" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="3760193536" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xE0200000" HIGHDECIMAL="3760197631" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xE0200FFF" INSTANCE="ps7_iop_bus_config_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="0" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="196607" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0x0002FFFF" INSTANCE="ps7_ram_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="196608" SIZEABRV="U">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4294901760" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xFFFF0000" HIGHDECIMAL="4294966783" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xFFFFFDFF" INSTANCE="ps7_ram_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="65024" SIZEABRV="U">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_PPI_S_AXI_BASEADDR" BASEVALUE="0xF8F01000" HIGHDECIMAL="4176478719" HIGHNAME="C_PPI_S_AXI_HIGHADDR" HIGHVALUE="0xF8F01FFF" INSTANCE="ps7_scugic_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00100" HIGHDECIMAL="4176478719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F001FF" INSTANCE="ps7_scugic_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F02000" HIGHDECIMAL="4176478719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F02FFF" INSTANCE="ps7_pl310_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8891000" HIGHDECIMAL="4176478719" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8891FFF" INSTANCE="ps7_pmu_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176478464" BASENAME="C_PMU1_S_AXI_BASEADDR" BASEVALUE="0xF8893000" HIGHDECIMAL="4176478719" HIGHNAME="C_PMU1_S_AXI_HIGHADDR" HIGHVALUE="0xF8893FFF" INSTANCE="ps7_pmu_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="256" SIZEABRV="256">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176479744" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00600" HIGHDECIMAL="4176479775" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F0061F" INSTANCE="ps7_scutimer_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="32" SIZEABRV="32">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4176479776" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8F00620" HIGHDECIMAL="4176479999" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8F006FF" INSTANCE="ps7_scuwdt_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="224" SIZEABRV="U">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8000000" HIGHDECIMAL="4160753663" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8000FFF" INSTANCE="ps7_slcr_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
        <MEMRANGE BASEDECIMAL="4160765952" BASENAME="C_S_AXI_BASEADDR" BASEVALUE="0xF8004000" HIGHDECIMAL="4160770047" HIGHNAME="C_S_AXI_HIGHADDR" HIGHVALUE="0xF8004FFF" INSTANCE="ps7_dma_ns" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="4096" SIZEABRV="4K">
        </MEMRANGE>
      </MEMORYMAP>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ddr_0" IPTYPE="PERIPHERAL" MODCLASS="MEMORY_CNTLR" MODTYPE="ps7_ddr" IS_ENABLE="pcw_uiparam_ddr_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_HP0_BASEADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp0_baseaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_S_AXI_HP0_HIGHADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp0_highaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_S_AXI_HP1_BASEADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp1_baseaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_S_AXI_HP1_HIGHADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp1_highaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_S_AXI_HP2_BASEADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp2_baseaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_S_AXI_HP2_HIGHADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp2_highaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_S_AXI_HP3_BASEADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp3_baseaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_S_AXI_HP3_HIGHADDR" VALUE="0xE0000000" PARAM="pcw_ddr_v4.00.a_c_s_axi_hp3_highaddr" CHANGED_BY="USER"/>

        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0x00100000"/>
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0000FFF" PARAM="pcw_ddr_ram_highaddr" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_uiparam_act_ddr_freq_mhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ethernet_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_ethernet" IS_ENABLE="pcw_enet0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE000B000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE000BFFF" />
        <PARAMETER NAME="C_ENET_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_enet0_internal_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_ENET_SLCR_1000Mbps_DIV0" VALUE="50000000" PARAM="pcw_enet0_slcr_1000mbps_div0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_1000Mbps_DIV1" VALUE="50000000" PARAM="pcw_enet0_slcr_1000mbps_div1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_100Mbps_DIV0" VALUE="50000000" PARAM="pcw_enet0_slcr_100mbps_div0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_100Mbps_DIV1" VALUE="50000000" PARAM="pcw_enet0_slcr_100mbps_div1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_10Mbps_DIV0" VALUE="50000000" PARAM="pcw_enet0_slcr_10mbps_div0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_10Mbps_DIV1" VALUE="50000000" PARAM="pcw_enet0_slcr_10mbps_div1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_MDIO" VALUE="50000000" PARAM="pcw_enet0_internal_mdio" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ETH_MODE" VALUE="50000000" PARAM="pcw_enet0_internal_eth_mode" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_RESET" VALUE="50000000" PARAM="pcw_enet0_reset_io" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_enet0_internal_freqmhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_ENET0" IRQID="54" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_ENET0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_ENET_WAKE0" IRQID="55" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_ENET_WAKE0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_ENET0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_ENET_WAKE0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_enet0_internal_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="GEM0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="GEM0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ethernet_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_ethernet" IS_ENABLE="pcw_enet1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE000C000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE000CFFF" />
        <PARAMETER NAME="C_ENET_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_enet1_internal_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_ENET_SLCR_1000Mbps_DIV0" VALUE="50000000" PARAM="pcw_enet1_slcr_1000mbps_div0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_1000Mbps_DIV1" VALUE="50000000" PARAM="pcw_enet1_slcr_1000mbps_div1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_100Mbps_DIV0" VALUE="50000000" PARAM="pcw_enet1_slcr_100mbps_div0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_100Mbps_DIV1" VALUE="50000000" PARAM="pcw_enet1_slcr_100mbps_div1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_10Mbps_DIV0" VALUE="50000000" PARAM="pcw_enet1_slcr_10mbps_div0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_SLCR_10Mbps_DIV1" VALUE="50000000" PARAM="pcw_enet1_slcr_10mbps_div1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_MDIO" VALUE="50000000" PARAM="pcw_enet1_internal_mdio" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ETH_MODE" VALUE="50000000" PARAM="pcw_enet1_internal_eth_mode" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_ENET_RESET" VALUE="50000000" PARAM="pcw_enet1_reset_io" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_enet1_internal_freqmhz" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_ENET1" IRQID="77" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_ENET1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_ENET_WAKE1" IRQID="78" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_ENET_WAKE1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_ENET1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_ENET_WAKE1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_enet1_internal_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="GEM1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="GEM1_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_usb_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_usb" IS_ENABLE="pcw_usb0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0002000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0002FFF" />
        <PARAMETER NAME="C_USB_RESET" VALUE="50000000" PARAM="pcw_usb0_reset_io" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_USB0" IRQID="53"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_USB0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_USB0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="USB0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_usb_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_usb" IS_ENABLE="pcw_usb1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0003000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0003FFF" />
        <PARAMETER NAME="C_USB_RESET" VALUE="5" PARAM="pcw_usb1_reset_io" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_USB1" IRQID="76"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_USB1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_USB1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="USB1_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_sd_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_sdio" IS_ENABLE="pcw_sd0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0100000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0100FFF" />
        <PARAMETER NAME="C_SDIO_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_sdio_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_CD" VALUE="50000000" PARAM="pcw_sd0_internal_cd" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_WP" VALUE="50000000" PARAM="pcw_sd0_internal_wp" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_POWER" VALUE="50000000" PARAM="pcw_sd0_internal_pow" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_sdio_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_SDIO0" IRQID="56"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_SDIO0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_SDIO0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_sdio_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SDIO0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SDIO0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_sd_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_sdio" IS_ENABLE="pcw_sd1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0101000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0101FFF" />
        <PARAMETER NAME="C_SDIO_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_sdio_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_CD" VALUE="50000000" PARAM="pcw_sd1_internal_cd" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_WP" VALUE="50000000" PARAM="pcw_sd1_internal_wp" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_POWER" VALUE="50000000" PARAM="pcw_sd1_internal_pow" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_sdio_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_SDIO1" IRQID="79"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_SDIO1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_SDIO1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_sdio_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SDIO1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SDIO1_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_i2c_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_i2c" IS_ENABLE="pcw_i2c0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0004000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0004FFF" />
        <PARAMETER NAME="C_I2C_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_apu_1x_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_INTERRUPT" VALUE="50000000" PARAM="pcw_i2c0_internal_int" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_I2C_RESET" VALUE="0" PARAM="pcw_i2c0_reset_io" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_I2C0" IRQID="57"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_I2C0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_I2C0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="I2C0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_i2c_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_i2c" IS_ENABLE="pcw_i2c1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0005000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0005FFF" />
        <PARAMETER NAME="C_I2C_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_apu_1x_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_INTERRUPT" VALUE="50000000" PARAM="pcw_i2c1_internal_int" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_I2C_RESET" VALUE="0" PARAM="pcw_i2c1_reset_io" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_I2C1" IRQID="80"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_I2C1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_I2C1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="I2C1_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_can_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_can" IS_ENABLE="pcw_can0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0008000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0008FFF" />
        <PARAMETER NAME="C_CAN_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_can0_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_can0_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_CAN0" IRQID="60"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_CAN0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_CAN0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_can0_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CAN0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CAN0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_spi_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_spi" IS_ENABLE="pcw_spi0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0006000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0006FFF" />
        <PARAMETER NAME="C_SPI_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_spi_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_SS0" VALUE="FALSE" PARAM="pcw_spi0_internal_ss0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_SS1" VALUE="FALSE" PARAM="pcw_spi0_internal_ss1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_SS2" VALUE="FALSE" PARAM="pcw_spi0_internal_ss2" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_spi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_SPI0" IRQID="58"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_SPI0"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_SPI0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_spi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SPI0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SPI0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_spi_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_spi" IS_ENABLE="pcw_spi1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0007000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0007FFF" />
        <PARAMETER NAME="C_SPI_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_spi_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_HAS_SS0" VALUE="FALSE" PARAM="pcw_spi1_internal_ss0" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_SS1" VALUE="FALSE" PARAM="pcw_spi1_internal_ss1" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_HAS_SS2" VALUE="FALSE" PARAM="pcw_spi1_internal_ss2" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_spi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_SPI1" IRQID="81"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_SPI1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_SPI1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_spi_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SPI1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SPI1_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_can_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_can" IS_ENABLE="pcw_can1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0009000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0009FFF" />
        <PARAMETER NAME="C_CAN_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_can1_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_can1_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_CAN1" IRQID="83" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_CAN1"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_CAN1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_can1_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CAN1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CAN0_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ttc_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_ttc" IS_ENABLE="pcw_ttc0_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8001000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8001FFF" />
        <PARAMETER NAME="C_TTC_CLK0_CLKSRC" VALUE="50000000" PARAM="pcw_ttc0_clk0_actual_clksrc" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_TTC_CLK1_CLKSRC" VALUE="50000000" PARAM="pcw_ttc0_clk1_actual_clksrc" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_TTC_CLK2_CLKSRC" VALUE="50000000" PARAM="pcw_ttc0_clk2_actual_clksrc" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_TTC_CLK0_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_ttc0_clk0_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_TTC_CLK1_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_ttc0_clk1_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_TTC_CLK2_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_ttc0_clk2_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="CPU_1X" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CPU_1X"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ttc_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_ttc" IS_ENABLE="pcw_ttc1_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8002000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8002FFF" />
        <PARAMETER NAME="C_TTC_CLK0_CLKSRC" VALUE="50000000" PARAM="pcw_ttc1_clk0_actual_clksrc" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_TTC_CLK1_CLKSRC" VALUE="50000000" PARAM="pcw_ttc1_clk1_actual_clksrc" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_TTC_CLK2_CLKSRC" VALUE="50000000" PARAM="pcw_ttc1_clk2_actual_clksrc" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_TTC_CLK0_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_ttc1_clk0_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_TTC_CLK1_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_ttc1_clk1_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_TTC_CLK2_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_ttc1_clk2_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="CPU_1X" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CPU_1X"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_wdt_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_wdt" IS_ENABLE="pcw_wdt_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8005000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8005FFF" />
        <PARAMETER NAME="C_WDT_CLK_FREQ_HZ" VALUE="50000000" PARAM="pcw_act_wdt_peripheral_freqmhz" CHANGED_BY="USER" MHZTOHZ="1"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" CLKFREQUENCY="pcw_act_wdt_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_pjtag_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_pjtag" IS_ENABLE="pcw_pjtag_peripheral_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_gpio_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_gpio" IS_ENABLE="pcw_gpio_peripheral_valid">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE000A000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE000AFFF" />
        <PARAMETER NAME="C_EMIO_GPIO_WIDTH" VALUE="50000000" PARAM="pcw_gpio_emio_gpio_width" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_MIO_GPIO_MASK" VALUE="0x5600" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_GPIO" IRQID="52"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_GPIO"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_GPIO"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="GPIO_APER"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ddrc_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_ddrc" IS_ENABLE="pcw_uiparam_ddr_enable">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8006000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8006FFF" />
        <PARAMETER NAME="C_HAS_ECC" VALUE="50000000" PARAM="pcw_ddr_internal_hasecc" CHANGED_BY="USER"/>
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_dev_cfg_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_dev_cfg">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8007000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF80070FF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_pcap_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="PCAP"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="FCLK0" CLKFREQUENCY="pcw_act_fpga0_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="FCLK0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="FCLK1" CLKFREQUENCY="pcw_act_fpga1_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="FCLK1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="FCLK2" CLKFREQUENCY="pcw_act_fpga2_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="FCLK2"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="FCLK3" CLKFREQUENCY="pcw_act_fpga3_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="FCLK3"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_xadc_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_xadc">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8007100" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8007120" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="REF_CLK" CLKFREQUENCY="pcw_act_pcap_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="PCAP"/>
         </PORT>
      </PORTS>
    </MODULE>  

    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ocmc_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_ocmc">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF800C000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF800CFFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_OCM" IRQID="35"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_OCM"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_P2F_OCM"/>
         </PORT>
      </PORTS>
    </MODULE> 
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_coresight_comp_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_coresight_comp">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8800000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF88FFFFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE> 
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_gpv_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_gpv">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8900000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF89FFFFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  

<MODULE HWVERSION="1.00.a" INSTANCE="ps7_scuc_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_scuc">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F00000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F000FC" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  

<MODULE HWVERSION="1.00.a" INSTANCE="ps7_globaltimer_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_globaltimer">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F00200" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F002FF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_GLOBALTIMER" IRQID="27"  SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_GLOBALTIMER"/>
         </PORT>
      </PORTS>
    </MODULE>  

<MODULE HWVERSION="1.00.a" INSTANCE="ps7_intc_dist_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_intc_dist">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F01000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F01FFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  

<MODULE HWVERSION="1.00.a" INSTANCE="ps7_l2cachec_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_l2cachec">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F02000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F02FFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_L2CHACE" IRQID="34"  SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_L2CHACE"/>
         </PORT>
      </PORTS>
    </MODULE>  

    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_dma_s" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_dma">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8003000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8003FFF" />
        <PARAMETER NAME="IS_SECURE" VALUE="TRUE" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="APB_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="DMA"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_iop_bus_config_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_iop_bus_config">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xE0200000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xE0200FFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ram_0" IPTYPE="PERIPHERAL" MODCLASS="MEMORY_CNTLR" MODTYPE="ps7_ram">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0x00000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0x0003FFFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_ram_1" IPTYPE="PERIPHERAL" MODCLASS="MEMORY_CNTLR" MODTYPE="ps7_ram">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xFFFC0000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xFFFFFFFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_scugic_0" IPTYPE="PERIPHERAL" MODTYPE="ps7_scugic" MODCLASS="INTERRUPT_CNTLR">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F00100" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F001FF" />
        <PARAMETER NAME="C_PPI_S_AXI_BASEADDR" VALUE="0xF8F01000" />
        <PARAMETER NAME="C_PPI_S_AXI_HIGHADDR" VALUE="0xF8F01FFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
		<PARAMETER NAME="C_IRQ_F2P_MODE" VALUE="DIRECT" PARAM="pcw_irq_f2p_mode" CHANGED_BY="USER"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="I" NAME="IRQ_F2P" SIG_IS="INTERRUPT" IRQID="91:90:89:88:87:86:85:84:68:67:66:65:64:63:62:61" PARAM="pcw_interrupt_irq_f2p" SENSITIVITY="LEVEL_HIGH">
           <CONNECTION INSTANCE="ps7_top" PORT="IRQ_F2P"/>
         </PORT>
         <PORT DIR="I" NAME="Core0_nFIQ" SIG_IS="INTERRUPT" IRQID="28" SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_top" PORT="Core0_nFIQ"/>
         </PORT>
         <PORT DIR="I" NAME="Core0_nIRQ" SIG_IS="INTERRUPT" IRQID="31" SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_top" PORT="Core0_nIRQ"/>
         </PORT>
         <PORT DIR="I" NAME="Core1_nFIQ" SIG_IS="INTERRUPT" IRQID="28" SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_top" PORT="Core1_nFIQ"/>
         </PORT>
         <PORT DIR="I" NAME="Core1_nIRQ" SIG_IS="INTERRUPT" IRQID="31" SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_top" PORT="Core1_nIRQ"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_UART0" IRQID="59" SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_uart0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_uart_0" PORT="IRQ_UART0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_UART1" IRQID="82" SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_uart1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_uart_1" PORT="IRQ_UART1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_QSPI" IRQID="51" SENSITIVITY="LEVEL_HIGH"  IS_ENABLE="pcw_qspi_peripheral_enable">
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="IRQ_QSPI"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_SMC" IRQID="50" SENSITIVITY="LEVEL_HIGH"  IS_ENABLE="pcw_smc_peripheral_valid">
           <CONNECTION INSTANCE="ps7_qspi_0" PORT="IRQ_SMC"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_ENET0" IRQID="54" SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_enet0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="IRQ_ENET0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_ENET_WAKE0" IRQID="55" SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_enet0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_ethernet_0" PORT="IRQ_ENET_WAKE0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_ENET1" IRQID="77" SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_enet1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="IRQ_ENET1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_ENET_WAKE1" IRQID="78" SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_enet1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_ethernet_1" PORT="IRQ_ENET_WAKE1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_USB0" IRQID="53"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_usb0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_usb_0" PORT="IRQ_USB0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_USB1" IRQID="76"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_usb1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_usb_1" PORT="IRQ_USB1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_SDIO0" IRQID="56"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_sd0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_sd_0" PORT="IRQ_SDIO0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_SDIO1" IRQID="79"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_sd1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_sd_1" PORT="IRQ_SDIO1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_I2C0" IRQID="57"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_i2c0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_i2c_0" PORT="IRQ_I2C0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_I2C1" IRQID="80"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_i2c1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_i2c_1" PORT="IRQ_I2C1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_CAN0" IRQID="60"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_can0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_can_0" PORT="IRQ_CAN0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_SPI0" IRQID="58"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_spi0_peripheral_enable">
           <CONNECTION INSTANCE="ps7_spi_0" PORT="IRQ_SPI0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_SPI1" IRQID="81"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_spi1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_spi_1" PORT="IRQ_SPI1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_CAN1" IRQID="83" SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_can1_peripheral_enable">
           <CONNECTION INSTANCE="ps7_can_1" PORT="IRQ_CAN1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_GPIO" IRQID="52"  SENSITIVITY="LEVEL_HIGH" IS_ENABLE="pcw_gpio_peripheral_enable">
           <CONNECTION INSTANCE="ps7_gpio_0" PORT="IRQ_GPIO"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_L2CHACE" IRQID="34"  SENSITIVITY="LEVEL_HIGH" >
           <CONNECTION INSTANCE="ps7_l2cachec_0" PORT="IRQ_L2CHACE"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_OCM" IRQID="35"  SENSITIVITY="LEVEL_HIGH" >
           <CONNECTION INSTANCE="ps7_ocmc_0" PORT="IRQ_OCM"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_PMU0" IRQID="37" SENSITIVITY="LEVEL_HIGH" >
           <CONNECTION INSTANCE="ps7_pmu_0" PORT="IRQ_PMU0"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_PMU1" IRQID="38" SENSITIVITY="LEVEL_HIGH" >
           <CONNECTION INSTANCE="ps7_pmu_0" PORT="IRQ_PMU1"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_GLOBALTIMER" IRQID="27"  SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE" >
           <CONNECTION INSTANCE="ps7_globaltimer_0" PORT="IRQ_GLOBALTIMER"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_SCUTIMER" IRQID="29"  SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_scutimer_0" PORT="IRQ_SCUTIMER"/>
         </PORT>
         <PORT DIR="I" SIG_IS="INTERRUPT" NAME="IRQ_SCUWDT" IRQID="30"  SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_scuwdt_0" PORT="IRQ_SCUWDT"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_scutimer_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_scutimer">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F00600" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F0061F" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_SCUTIMER" IRQID="29" SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_SCUTIMER"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="CPU_3OR2X" CLKFREQUENCY="pcw_apu_2x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CPU_3OR2X"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_scuwdt_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_scuwdt">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8F00620" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8F006FF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
         <PORT DIR="O" SIG_IS="INTERRUPT" NAME="IRQ_SCUWDT" IRQID="30" SENSITIVITY="LEVEL_HIGH" INT_TYPE="PRIVATE">
           <CONNECTION INSTANCE="ps7_scugic_0" PORT="IRQ_SCUWDT"/>
         </PORT>
         <PORT DIR="I" SIG_IS="CLK" NAME="CPU_3OR2X" CLKFREQUENCY="pcw_apu_2x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="CPU_3OR2X"/>
         </PORT>
         <PORT DIR="O" SIG_IS="CLK" NAME="APER_CLK" CLKFREQUENCY="pcw_apu_1x_peripheral_freqmhz">
           <CONNECTION INSTANCE="ps7_clockc_0" PORT="SWDT"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_slcr_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_slcr">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8000FFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_dma_ns" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_dma">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8004000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8004FFF" />
        <PARAMETER NAME="IS_SECURE" VALUE="FALSE" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_afi_0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_afi">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8008000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8008FFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_afi_1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_afi">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF8009000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF8009FFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_afi_2" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_afi">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF800A000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF800AFFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_afi_3" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_afi">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0xF800B000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xF800BFFF" />
        <PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_m_axi_gp0" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_m_axi_gp" IS_ENABLE="pcw_use_m_axi_gp0">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0x40000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0x7FFFFFFF" />
		<PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
	</MODULE>  
    <MODULE HWVERSION="1.00.a" INSTANCE="ps7_m_axi_gp1" IPTYPE="PERIPHERAL" MODCLASS="PERIPHERAL" MODTYPE="ps7_m_axi_gp" IS_ENABLE="pcw_use_m_axi_gp1">
      <PARAMETERS>
        <PARAMETER NAME="C_S_AXI_BASEADDR" VALUE="0x80000000" />
        <PARAMETER NAME="C_S_AXI_HIGHADDR" VALUE="0xBFFFFFFF" />
		<PARAMETER NAME="C_INTERCONNECT_S_AXI_MASTERS" VALUE="ps7_cortexa9_0.M_AXI_DP &amp; ps7_cortexa9_1.M_AXI_DP"/>
      </PARAMETERS>
      <BUS_INTERFACE>
        <BUS NAME="S_AXI" PROTOCOL="AXI" TYPE="SLAVE" CONNECTION="ps7_axi_interconnect_0" CONNBUS="M_AXI" >
          <PORT NAME="S_AXI_ACLK"/>
          <PORT NAME="S_AXI_ARESETN"/>
          <PORT NAME="S_AXI_AWADDR"/>
          <PORT NAME="S_AXI_AWVALID"/>
          <PORT NAME="S_AXI_AWREADY"/>
          <PORT NAME="S_AXI_WDATA"/>
          <PORT NAME="S_AXI_WSTRB"/>
          <PORT NAME="S_AXI_WVALID"/>
          <PORT NAME="S_AXI_WREADY"/>
          <PORT NAME="S_AXI_BRESP"/>
          <PORT NAME="S_AXI_BVALID"/>
          <PORT NAME="S_AXI_BREADY"/>
          <PORT NAME="S_AXI_ARADDR"/>
          <PORT NAME="S_AXI_ARVALID"/>
          <PORT NAME="S_AXI_ARREADY"/>
          <PORT NAME="S_AXI_RDATA"/>
          <PORT NAME="S_AXI_RRESP"/>
          <PORT NAME="S_AXI_RVALID"/>
          <PORT NAME="S_AXI_RREADY"/>
        </BUS>  
      </BUS_INTERFACE>
      <PORTS>
         <PORT DIR="I" SIG_IS="CLK" NAME="S_AXI_ACLK" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ACLK"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARESETN" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARESETN"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_AWVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_AWREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_AWREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WDATA"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WSTRB" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WSTRB"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_WVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_WREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_WREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_BVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_BREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_BREADY"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARADDR" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARADDR"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_ARVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARVALID"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_ARREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_ARREADY"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RDATA" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RDATA"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RRESP" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RRESP"/>
         </PORT>
         <PORT DIR="O" NAME="S_AXI_RVALID" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RVALID"/>
         </PORT>
         <PORT DIR="I" NAME="S_AXI_RREADY" >
           <CONNECTION INSTANCE="ps7_axi_interconnect_0" PORT="M_AXI_RREADY"/>
         </PORT>
      </PORTS>
    </MODULE>  
    <SLAVE_BASED_MAP>  
      <SLAVE BASENAME="HP0_LOW_OCM"> <INSTANCE name="ps7_ram_0"/> </SLAVE>
      <SLAVE BASENAME="HP0_DDR_LOWOCM">
        <INSTANCE name="ps7_ddr_0"/> 
        <INSTANCE name="ps7_ram_0"/> 
      </SLAVE>
      <SLAVE BASENAME="HP0_HIGH_OCM"> <INSTANCE name="ps7_ram_1"/> </SLAVE>
      <SLAVE BASENAME="HP1_LOW_OCM"> <INSTANCE name="ps7_ram_0"/> </SLAVE>
      <SLAVE BASENAME="HP1_DDR_LOWOCM"> 
        <INSTANCE name="ps7_ddr_0"/> 
        <INSTANCE name="ps7_ram_0"/> 
      </SLAVE>
      <SLAVE BASENAME="HP1_HIGH_OCM"> <INSTANCE name="ps7_ram_1"/> </SLAVE>
      <SLAVE BASENAME="HP2_LOW_OCM"> <INSTANCE name="ps7_ram_0"/> </SLAVE>
      <SLAVE BASENAME="HP2_DDR_LOWOCM"> 
        <INSTANCE name="ps7_ddr_0"/>
        <INSTANCE name="ps7_ram_0"/>
      </SLAVE>
      <SLAVE BASENAME="HP2_HIGH_OCM"> <INSTANCE name="ps7_ram_1"/> </SLAVE>
      <SLAVE BASENAME="HP3_LOW_OCM"> <INSTANCE name="ps7_ram_0"/> </SLAVE>
      <SLAVE BASENAME="HP3_DDR_LOWOCM" > 
        <INSTANCE name="ps7_ddr_0"/> 
        <INSTANCE name="ps7_ram_0"/>
      </SLAVE>
      <SLAVE BASENAME="HP3_HIGH_OCM"> <INSTANCE name="ps7_ram_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_LOW_OCM"> <INSTANCE name="ps7_ram_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_DDR_LOWOCM"> 
        <INSTANCE name="ps7_ddr_0"/> 
        <INSTANCE name="ps7_ram_0"/>
      </SLAVE>
      <SLAVE BASENAME="GP0_M_AXI_GP0"> <INSTANCE name="ps7_m_axi_gp0"/> </SLAVE>
      <SLAVE BASENAME="GP0_M_AXI_GP1"> <INSTANCE name="ps7_m_axi_gp1"/> </SLAVE>
      <SLAVE BASENAME="GP0_UART0"> <INSTANCE name="ps7_uart_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_UART1"> <INSTANCE name="ps7_uart_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_USB0"> <INSTANCE name="ps7_usb_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_USB1"> <INSTANCE name="ps7_usb_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_SPI0"> <INSTANCE name="ps7_spi_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_SPI1"> <INSTANCE name="ps7_spi_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_CAN0"> <INSTANCE name="ps7_can_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_CAN1"> <INSTANCE name="ps7_can_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_GPIO"> <INSTANCE name="ps7_gpio_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_ENET0"> <INSTANCE name="ps7_ethernet_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_ENET1"> <INSTANCE name="ps7_ethernet_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_SDIO0"> <INSTANCE name="ps7_sd_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_SDIO1"> <INSTANCE name="ps7_sd_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_TTC0"> <INSTANCE name="ps7_ttc_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_TTC1"> <INSTANCE name="ps7_ttc_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_QSPI"> <INSTANCE name="ps7_qspi_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_IIC0"> <INSTANCE name="ps7_i2c_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_IIC1"> <INSTANCE name="ps7_i2c_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_HIGH_OCM"> <INSTANCE name="ps7_ram_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_LOW_OCM"> <INSTANCE name="ps7_ram_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_DDR_LOWOCM"> 
        <INSTANCE name="ps7_ddr_0"/>
        <INSTANCE name="ps7_ram_0"/>
      </SLAVE>
      <SLAVE BASENAME="GP1_M_AXI_GP0"> <INSTANCE name="ps7_m_axi_gp0"/> </SLAVE>
      <SLAVE BASENAME="GP1_M_AXI_GP1"> <INSTANCE name="ps7_m_axi_gp1"/> </SLAVE>
      <SLAVE BASENAME="GP1_UART0"> <INSTANCE name="ps7_uart_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_UART1"> <INSTANCE name="ps7_uart_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_USB0"> <INSTANCE name="ps7_usb_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_USB1"> <INSTANCE name="ps7_usb_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_SPI0"> <INSTANCE name="ps7_spi_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_SPI1"> <INSTANCE name="ps7_spi_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_CAN0"> <INSTANCE name="ps7_can_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_CAN1"> <INSTANCE name="ps7_can_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_GPIO"> <INSTANCE name="ps7_gpio_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_ENET0"> <INSTANCE name="ps7_ethernet_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_ENET1"> <INSTANCE name="ps7_ethernet_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_SDIO0"> <INSTANCE name="ps7_sd_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_SDIO1"> <INSTANCE name="ps7_sd_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_TTC0"> <INSTANCE name="ps7_ttc_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_TTC1"> <INSTANCE name="ps7_ttc_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_QSPI"> <INSTANCE name="ps7_qspi_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_IIC0"> <INSTANCE name="ps7_i2c_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_IIC1"> <INSTANCE name="ps7_i2c_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_HIGH_OCM"> <INSTANCE name="ps7_ram_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_LOW_OCM"> <INSTANCE name="ps7_ram_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_DDR_LOWOCM"> 
        <INSTANCE name="ps7_ddr_0"/> 
        <INSTANCE name="ps7_ram_0"/> 
      </SLAVE>
      <SLAVE BASENAME="ACP_M_AXI_GP0"> <INSTANCE name="ps7_m_axi_gp0"/> </SLAVE>
      <SLAVE BASENAME="ACP_M_AXI_GP1"> <INSTANCE name="ps7_m_axi_gp1"/> </SLAVE>
      <SLAVE BASENAME="GP1_SRAM_NOR0"> 
        <INSTANCE name="ps7_sram_0"/> 
      </SLAVE>
      <SLAVE BASENAME="GP1_SRAM_NOR1"> 
        <INSTANCE name="ps7_sram_1"/> 
      </SLAVE>
      <SLAVE BASENAME="GP1_QSPI_LINEAR"> <INSTANCE name="ps7_qspi_linear_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_NAND"> <INSTANCE name="ps7_nand_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_SMC"> <INSTANCE name="ps7_smcc_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_SWDT"> <INSTANCE name="ps7_wdt_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_DDRC"> <INSTANCE name="ps7_ddrc_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_DMAC_S"> <INSTANCE name="ps7_dma_s"/> </SLAVE>
      <SLAVE BASENAME="GP1_DMAC_NS"> <INSTANCE name="ps7_dma_ns"/> </SLAVE>
      <SLAVE BASENAME="GP1_AFI0"> <INSTANCE name="ps7_afi_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_AFI1"> <INSTANCE name="ps7_afi_1"/> </SLAVE>
      <SLAVE BASENAME="GP1_AFI2"> <INSTANCE name="ps7_afi_2"/> </SLAVE>
      <SLAVE BASENAME="GP1_AFI3"> <INSTANCE name="ps7_afi_3"/> </SLAVE>
      <SLAVE BASENAME="GP1_SLCR"> <INSTANCE name="ps7_slcr_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_DEVCFG"> 
        <INSTANCE name="ps7_xadc_0"/> 
        <INSTANCE name="ps7_dev_cfg_0"/>
      </SLAVE>
      <SLAVE BASENAME="GP1_PS_SLCR_REGS"> 
        <INSTANCE name="ps7_slcr_0"/> 
        <INSTANCE name="ps7_scuwdt_0"/> 
        <INSTANCE name="ps7_afi_0"/> 
        <INSTANCE name="ps7_afi_1"/> 
        <INSTANCE name="ps7_afi_2"/> 
        <INSTANCE name="ps7_afi_3"/> 
        <INSTANCE name="ps7_dma_s"/> 
        <INSTANCE name="ps7_dma_ns"/> 
        <INSTANCE name="ps7_wdt_0" param="pcw_wdt_peripheral_enable"/> 
        <INSTANCE name="ps7_ttc_0" param="pcw_ttc0_peripheral_enable"/> 
        <INSTANCE name="ps7_ttc_1" param="pcw_ttc1_peripheral_enable"/> 
        <INSTANCE name="ps7_dev_cfg_0"/> 
        <INSTANCE name="ps7_xadc_0"/> 
        <INSTANCE name="ps7_ddrc_0"/> 
      </SLAVE>
      <SLAVE BASENAME="GP1_OCM_REG"> <INSTANCE name="ps7_ocmc_0"/> </SLAVE>
      <SLAVE BASENAME="GP1_DAP_ROM"> </SLAVE>
      <SLAVE BASENAME="GP0_SRAM_NOR0"> 
        <INSTANCE name="ps7_sram_0"/> 
      </SLAVE>
      <SLAVE BASENAME="GP0_SRAM_NOR1"> 
        <INSTANCE name="ps7_sram_1"/> 
      </SLAVE>
      <SLAVE BASENAME="GP0_QSPI_LINEAR"> <INSTANCE name="ps7_qspi_linear_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_NAND"> <INSTANCE name="ps7_nand_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_SMC"> <INSTANCE name="ps7_smcc_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_SWDT"> <INSTANCE name="ps7_wdt_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_DDRC"> <INSTANCE name="ps7_ddrc_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_DMAC_S"> <INSTANCE name="ps7_dma_s"/> </SLAVE>
      <SLAVE BASENAME="GP0_DMAC_NS"> <INSTANCE name="ps7_dma_ns"/> </SLAVE>
      <SLAVE BASENAME="GP0_AFI0"> <INSTANCE name="ps7_afi_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_AFI1"> <INSTANCE name="ps7_afi_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_AFI2"> <INSTANCE name="ps7_afi_2"/> </SLAVE>
      <SLAVE BASENAME="GP0_AFI3"> <INSTANCE name="ps7_afi_3"/> </SLAVE>
      <SLAVE BASENAME="GP0_DEVCFG"> 
        <INSTANCE name="ps7_xadc_0"/> 
        <INSTANCE name="ps7_dev_cfg_0"/>
      </SLAVE>  
      <SLAVE BASENAME="GP0_XADC"> <INSTANCE name="ps7_xadc_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_SLCR"> <INSTANCE name="ps7_slcr_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_PS_SLCR_REGS"> 
        <INSTANCE name="ps7_slcr_0"/> 
        <INSTANCE name="ps7_scuwdt_0"/> 
        <INSTANCE name="ps7_afi_0"/> 
        <INSTANCE name="ps7_afi_1"/> 
        <INSTANCE name="ps7_afi_2"/> 
        <INSTANCE name="ps7_afi_3"/> 
        <INSTANCE name="ps7_dma_s"/> 
        <INSTANCE name="ps7_dma_ns"/> 
        <INSTANCE name="ps7_wdt_0" param="pcw_wdt_peripheral_enable"/> 
        <INSTANCE name="ps7_ttc_0" param="pcw_ttc0_peripheral_enable"/> 
        <INSTANCE name="ps7_ttc_1" param="pcw_ttc1_peripheral_enable"/> 
        <INSTANCE name="ps7_dev_cfg_0"/> 
        <INSTANCE name="ps7_xadc_0"/> 
        <INSTANCE name="ps7_ddrc_0"/> 
      </SLAVE>
      <SLAVE BASENAME="GP0_OCM_REG"> <INSTANCE name="ps7_ocmc_0"/> </SLAVE>
      <SLAVE BASENAME="GP0_DAP_ROM"> </SLAVE>
      <SLAVE BASENAME="ACP_SRAM_NOR0"> 
        <INSTANCE name="ps7_sram_0"/> 
      </SLAVE>
      <SLAVE BASENAME="ACP_SRAM_NOR1"> 
        <INSTANCE name="ps7_sram_1"/> 
      </SLAVE>
      <SLAVE BASENAME="ACP_QSPI_LINEAR"> <INSTANCE name="ps7_qspi_linear_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_NAND"> <INSTANCE name="ps7_nand_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_SMC"> <INSTANCE name="ps7_smcc_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_SWDT"> <INSTANCE name="ps7_wdt_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_DDRC"> <INSTANCE name="ps7_ddrc_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_DMAC_S"> <INSTANCE name="ps7_dma_s"/> </SLAVE>
      <SLAVE BASENAME="ACP_DMAC_NS"> <INSTANCE name="ps7_dma_ns"/> </SLAVE>
      <SLAVE BASENAME="ACP_AFI0"> <INSTANCE name="ps7_afi_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_AFI1"> <INSTANCE name="ps7_afi_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_AFI2"> <INSTANCE name="ps7_afi_2"/> </SLAVE>
      <SLAVE BASENAME="ACP_AFI3"> <INSTANCE name="ps7_afi_3"/> </SLAVE>
      <SLAVE BASENAME="ACP_DEVCFG"> 
        <INSTANCE name="ps7_xadc_0"/> 
        <INSTANCE name="ps7_dev_cfg_0"/>
      </SLAVE>  
      <SLAVE BASENAME="ACP_XADC"> <INSTANCE name="ps7_xadc_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_SLCR"> <INSTANCE name="ps7_slcr_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_PS_SLCR_REGS"> 
        <INSTANCE name="ps7_slcr_0"/> 
        <INSTANCE name="ps7_scuwdt_0"/> 
        <INSTANCE name="ps7_afi_0"/> 
        <INSTANCE name="ps7_afi_1"/> 
        <INSTANCE name="ps7_afi_2"/> 
        <INSTANCE name="ps7_afi_3"/> 
        <INSTANCE name="ps7_dma_s"/> 
        <INSTANCE name="ps7_dma_ns"/> 
        <INSTANCE name="ps7_wdt_0" param="pcw_wdt_peripheral_enable"/> 
        <INSTANCE name="ps7_ttc_0" param="pcw_ttc0_peripheral_enable"/> 
        <INSTANCE name="ps7_ttc_1" param="pcw_ttc1_peripheral_enable"/> 
        <INSTANCE name="ps7_dev_cfg_0"/> 
        <INSTANCE name="ps7_xadc_0"/> 
        <INSTANCE name="ps7_ddrc_0"/> 
      </SLAVE>
      <SLAVE BASENAME="ACP_OCM_REG"> <INSTANCE name="ps7_ocmc_0"/></SLAVE>
      <SLAVE BASENAME="ACP_DAP_ROM"> </SLAVE>
      <SLAVE BASENAME="ACP_UART0"> <INSTANCE name="ps7_uart_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_UART1"> <INSTANCE name="ps7_uart_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_USB0"> <INSTANCE name="ps7_usb_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_USB1"> <INSTANCE name="ps7_usb_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_SPI0"> <INSTANCE name="ps7_spi_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_SPI1"> <INSTANCE name="ps7_spi_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_CAN0"> <INSTANCE name="ps7_can_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_CAN1"> <INSTANCE name="ps7_can_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_GPIO"> <INSTANCE name="ps7_gpio_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_ENET0"> <INSTANCE name="ps7_ethernet_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_ENET1"> <INSTANCE name="ps7_ethernet_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_SDIO0"> <INSTANCE name="ps7_sd_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_SDIO1"> <INSTANCE name="ps7_sd_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_TTC0"> <INSTANCE name="ps7_ttc_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_TTC1"> <INSTANCE name="ps7_ttc_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_QSPI"> <INSTANCE name="ps7_qspi_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_IIC0"> <INSTANCE name="ps7_i2c_0"/> </SLAVE>
      <SLAVE BASENAME="ACP_IIC1"> <INSTANCE name="ps7_i2c_1"/> </SLAVE>
      <SLAVE BASENAME="ACP_HIGH_OCM"> <INSTANCE name="ps7_ram_1"/> </SLAVE>
      <SLAVE BASENAME="GP0_IOP"> 
        <INSTANCE name="ps7_uart_0" param="pcw_uart0_peripheral_enable"/> 
        <INSTANCE name="ps7_uart_1" param="pcw_uart1_peripheral_enable"/>
        <INSTANCE name="ps7_usb_0" param="pcw_usb0_peripheral_enable"/>
        <INSTANCE name="ps7_usb_1" param="pcw_usb1_peripheral_enable"/>
        <INSTANCE name="ps7_spi_0" param="pcw_spi0_peripheral_enable"/>
        <INSTANCE name="ps7_spi_1" param="pcw_spi1_peripheral_enable"/>
        <INSTANCE name="ps7_can_0" param="pcw_can0_peripheral_enable"/>
        <INSTANCE name="ps7_can_1" param="pcw_can1_peripheral_enable"/>
        <INSTANCE name="ps7_gpio_0" param="pcw_gpio_peripheral_valid"/>
        <INSTANCE name="ps7_ethernet_0" param="pcw_enet0_peripheral_enable"/> 
        <INSTANCE name="ps7_ethernet_1" param="pcw_enet1_peripheral_enable"/>
        <INSTANCE name="ps7_sd_0" param="pcw_sd0_peripheral_enable"/>
        <INSTANCE name="ps7_sd_1" param="pcw_sd1_peripheral_enable"/>
        <INSTANCE name="ps7_smcc_0" param="pcw_smc_peripheral_valid"/>
        <INSTANCE name="ps7_qspi_0" param="pcw_qspi_peripheral_enable"/>
        <INSTANCE name="ps7_i2c_0" param="pcw_i2c0_peripheral_enable"/>
        <INSTANCE name="ps7_i2c_1" param="pcw_i2c1_peripheral_enable"/> 
      </SLAVE>
      <SLAVE BASENAME="GP1_IOP"> 
        <INSTANCE name="ps7_uart_0" param="pcw_uart0_peripheral_enable"/> 
        <INSTANCE name="ps7_uart_1" param="pcw_uart1_peripheral_enable"/>
        <INSTANCE name="ps7_usb_0" param="pcw_usb0_peripheral_enable"/>
        <INSTANCE name="ps7_usb_1" param="pcw_usb1_peripheral_enable"/>
        <INSTANCE name="ps7_spi_0" param="pcw_spi0_peripheral_enable"/>
        <INSTANCE name="ps7_spi_1" param="pcw_spi1_peripheral_enable"/>
        <INSTANCE name="ps7_can_0" param="pcw_can0_peripheral_enable"/>
        <INSTANCE name="ps7_can_1" param="pcw_can1_peripheral_enable"/>
        <INSTANCE name="ps7_gpio_0" param="pcw_gpio_peripheral_valid"/>
        <INSTANCE name="ps7_ethernet_0" param="pcw_enet0_peripheral_enable"/> 
        <INSTANCE name="ps7_ethernet_1" param="pcw_enet1_peripheral_enable"/>
        <INSTANCE name="ps7_sd_0" param="pcw_sd0_peripheral_enable"/>
        <INSTANCE name="ps7_sd_1" param="pcw_sd1_peripheral_enable"/>
        <INSTANCE name="ps7_smcc_0" param="pcw_smc_peripheral_valid"/>
        <INSTANCE name="ps7_qspi_0" param="pcw_qspi_peripheral_enable"/>
        <INSTANCE name="ps7_i2c_0" param="pcw_i2c0_peripheral_enable"/>
        <INSTANCE name="ps7_i2c_1" param="pcw_i2c1_peripheral_enable"/> 
      </SLAVE>
      <SLAVE BASENAME="ACP_IOP"> 
        <INSTANCE name="ps7_uart_0" param="pcw_uart0_peripheral_enable"/> 
        <INSTANCE name="ps7_uart_1" param="pcw_uart1_peripheral_enable"/>
        <INSTANCE name="ps7_usb_0" param="pcw_usb0_peripheral_enable"/>
        <INSTANCE name="ps7_usb_1" param="pcw_usb1_peripheral_enable"/>
        <INSTANCE name="ps7_spi_0" param="pcw_spi0_peripheral_enable"/>
        <INSTANCE name="ps7_spi_1" param="pcw_spi1_peripheral_enable"/>
        <INSTANCE name="ps7_can_0" param="pcw_can0_peripheral_enable"/>
        <INSTANCE name="ps7_can_1" param="pcw_can1_peripheral_enable"/>
        <INSTANCE name="ps7_gpio_0" param="pcw_gpio_peripheral_valid"/>
        <INSTANCE name="ps7_ethernet_0" param="pcw_enet0_peripheral_enable"/> 
        <INSTANCE name="ps7_ethernet_1" param="pcw_enet1_peripheral_enable"/>
        <INSTANCE name="ps7_sd_0" param="pcw_sd0_peripheral_enable"/>
        <INSTANCE name="ps7_sd_1" param="pcw_sd1_peripheral_enable"/>
        <INSTANCE name="ps7_smcc_0" param="pcw_smc_peripheral_valid"/>
        <INSTANCE name="ps7_qspi_0" param="pcw_qspi_peripheral_enable"/>
        <INSTANCE name="ps7_i2c_0" param="pcw_i2c0_peripheral_enable"/>
        <INSTANCE name="ps7_i2c_1" param="pcw_i2c1_peripheral_enable"/> 
      </SLAVE>
    </SLAVE_BASED_MAP>  
    <SYSTEMINTERFACE>  
        <INTERFACE NAME="M_AXI_GP0" >
          <PARAMETERS> <PARAM NAME="PCW_USE_M_AXI_GP0"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="32"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="M_AXI_GP0_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="M_AXI_GP1" >
          <PARAMETERS> <PARAM NAME="PCW_USE_M_AXI_GP1"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="32"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="M_AXI_GP0_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_GP0" >
          <PARAMETERS> <PARAM NAME="PCW_USE_S_AXI_GP0"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="32"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="M_AXI_GP0_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_GP1" >
          <PARAMETERS> <PARAM NAME="PCW_USE_S_AXI_GP1"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="32"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="M_AXI_GP1_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_ACP" >
          <PARAMETERS>
           <PARAM NAME="PCW_USE_S_AXI_ACP"/>
           <PARAM NAME="PCW_USE_DEFAULT_ACP_USER_VAL"/>
          </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="32"/>
            <ATTRIBUTE NAME="CACHECOHERENT" VALUE="true"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="S_AXI_ACP_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP0" >
          <PARAMETERS> <PARAM NAME="PCW_USE_S_AXI_HP0"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="64"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="S_AXI_HP0_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP1" >
          <PARAMETERS> <PARAM NAME="PCW_USE_S_AXI_HP1"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="64"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="S_AXI_HP1_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP2" >
          <PARAMETERS> <PARAM NAME="PCW_USE_S_AXI_HP2"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="64"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="S_AXI_HP2_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP3" >
          <PARAMETERS> <PARAM NAME="PCW_USE_S_AXI_HP3"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="aximm" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
            <ATTRIBUTE NAME="DATAWIDTH" VALUE="64"/>
            <ATTRIBUTE NAME="CLOCKREF" VALUE="S_AXI_HP3_ACLK"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="M_AXI_GP0_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="M_AXI_GP1_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_GP0_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_GP1_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_ACP_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP0_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP1_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP2_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="S_AXI_HP3_ACLK" >
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="slave"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="IRQ_F2P" >
          <PARAMETERS>
            <PARAM NAME="PCW_USE_FABRIC_INTERRUPT"/>
            <PARAM NAME="PCW_IRQ_F2P_INTR"/>
          </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="IRQ" VALUE="91:90:89:88:87:86:85:84:68:67:66:65:64:63:62:61" PARAM="pcw_interrupt_irq_f2p"/>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="interrupt" />
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_CLK0">
          <PARAMETERS> <PARAM NAME="PCW_EN_CLK0_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="FREQUENCY" VALUE="100" PARAM="pcw_act_fpga0_peripheral_freqmhz" FREQ="1"/>
            <ATTRIBUTE NAME="STATUS" VALUE="changeable"/>
            <ATTRIBUTE NAME="ID" VALUE="0"/>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_CLK1">
          <PARAMETERS> <PARAM NAME="PCW_EN_CLK1_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="FREQUENCY" VALUE="100" PARAM="pcw_act_fpga1_peripheral_freqmhz" FREQ="1"/>
            <ATTRIBUTE NAME="STATUS" VALUE="changeable"/>
            <ATTRIBUTE NAME="ID" VALUE="1"/>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_CLK2">
          <PARAMETERS> <PARAM NAME="PCW_EN_CLK2_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="FREQUENCY" VALUE="100" PARAM="pcw_act_fpga2_peripheral_freqmhz" FREQ="1"/>
            <ATTRIBUTE NAME="STATUS" VALUE="changeable"/>
            <ATTRIBUTE NAME="ID" VALUE="2"/>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_CLK3">
          <PARAMETERS> <PARAM NAME="PCW_EN_CLK3_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="FREQUENCY" VALUE="100" PARAM="pcw_act_fpga3_peripheral_freqmhz" FREQ="1"/>
            <ATTRIBUTE NAME="STATUS" VALUE="changeable"/>
            <ATTRIBUTE NAME="ID" VALUE="3"/>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="clock" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_RESET0_N">
          <PARAMETERS> <PARAM NAME="PCW_EN_RST0_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="reset" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_RESET1_N">
          <PARAMETERS> <PARAM NAME="PCW_EN_RST1_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="reset" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_RESET2_N">
          <PARAMETERS> <PARAM NAME="PCW_EN_RST2_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="reset" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="FCLK_RESET3_N">
          <PARAMETERS> <PARAM NAME="PCW_EN_RST3_PORT"/> </PARAMETERS>
          <ATTRIBUTES>
            <ATTRIBUTE NAME="BUSTYPEREF" VALUE="reset" />
            <ATTRIBUTE NAME="MODE" VALUE="master"/>
          </ATTRIBUTES>
        </INTERFACE>
        <INTERFACE NAME="CPU">
          <ATTRIBUTES>
            <ATTRIBUTE NAME="FREQUENCY" VALUE="100" PARAM="pcw_apu_1x_peripheral_freqmhz" FREQ="1"/>
            <ATTRIBUTE NAME="STATUS" VALUE="reserved"/>
            </ATTRIBUTES>
        </INTERFACE>
    </SYSTEMINTERFACE>  
</sdkgen>
