<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2014.2 (64-bit)              -->
<!--                                                         -->
<!-- Copyright (c) 2001-2013 Xilinx Inc, All rights reserved -->

<Project Version="7" Minor="1" Path="C:/Avnet/MicroZed/Projects/MZ_Basic_System/MZ_Basic_System.xpr">
  <DefaultLaunch Dir="$PRUNDIR"/>
  <Configuration>
    <Option Name="Id" Val="b6ad93251c024f6a99f5815a4c6dfeb1"/>
    <Option Name="Part" Val="xc7z010clg400-1"/>
    <Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
    <Option Name="BoardPart" Val="em.avnet.com:microzed_7010:part0:1.0"/>
    <Option Name="BoardPartRepoPaths" Val="$PPRDIR/../../../../AvnetBoards"/>
    <Option Name="ActiveSimSet" Val="sim_1"/>
    <Option Name="DefaultLib" Val="xil_defaultlib"/>
  </Configuration>
  <FileSets Version="1" Minor="31">
    <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
      <Filter Type="Srcs"/>
      <File Path="$PSRCDIR/sources_1/bd/System/System.bd">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
        <CompFileExtendedInfo CompFileName="System.bd" FileRelPathName="ip/System_processing_system7_0_0/System_processing_system7_0_0.xci"/>
        <CompFileExtendedInfo CompFileName="System.bd" FileRelPathName="hw_handoff/System.hwh"/>
        <CompFileExtendedInfo CompFileName="System.bd" FileRelPathName="System_ooc.xdc"/>
        <CompFileExtendedInfo CompFileName="System.bd" FileRelPathName="hdl/System.v"/>
      </File>
      <File Path="$PSRCDIR/sources_1/bd/System/hdl/System_wrapper.v">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="System_wrapper"/>
        <Option Name="TopAutoSet" Val="TRUE"/>
      </Config>
    </FileSet>
    <FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
      <Filter Type="Constrs"/>
      <Config>
        <Option Name="ConstrsType" Val="XDC"/>
      </Config>
    </FileSet>
    <FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1">
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="System_wrapper"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TopAutoSet" Val="TRUE"/>
        <Option Name="SrcSet" Val="sources_1"/>
      </Config>
    </FileSet>
  </FileSets>
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      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2014">
          <Desc>Vivado Synthesis Defaults</Desc>
        </StratHandle>
        <Step Id="synth_design"/>
      </Strategy>
      <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
    </Run>
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      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2014">
          <Desc>Vivado Implementation Defaults</Desc>
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        <Step Id="init_design"/>
        <Step Id="opt_design"/>
        <Step Id="power_opt_design"/>
        <Step Id="place_design"/>
        <Step Id="post_place_power_opt_design"/>
        <Step Id="phys_opt_design"/>
        <Step Id="route_design"/>
        <Step Id="post_route_phys_opt_design"/>
        <Step Id="write_bitstream"/>
      </Strategy>
      <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
    </Run>
  </Runs>
</Project>
