2014.2:
 * Version 5.4 (Rev. 1)
 * Add the polarity feature for reset (USB, I2C and Ethernet) pins
 * Add the IP type is processor
 * Fixed LPDDR2 hang Issue

2014.1:
 * Version 5.4
 * IRQ_F2P connections to be made directly in the silicon

2013.4:
 * Version 5.3 (Rev. 1)
 * DDRIOB_SLEW registers added in ps7_init
 * Removed toggling of FPGA_RST_CTRL register from post_config
 * Trace enabled for different port size such as  2,4,8,16 and 32 bits

2013.3:
 * Version 5.3
 * Added Microzed board preset In ps7 ip
 * xz0303 SBG package added
 * TCL based preset support  for Zynq
 * Zynq BFM subcore added for simulation support

2013.2:
 * Version 5.2
 * Zynq Power Estimation Support added
 * Extended addresing support for SMC memories, QSPI memory, PS registers and SLCR registers
 * Peripheral I/O pin page made more user interactive

2013.1:
 * Version 5.01
 * Added support for ps7 preset configurations
 * Multiple silicon version support
 * Ps7 gui enhanced to vivado standard

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