The Virtex®-7 FPGA VC7215 Characterization Kit provides the hardware environment for characterizing and evaluating 80 GTH (13.1Gbps) transceivers of the on-board Virtex-7 V690T FPGA. The VC7215 allows evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado design suite. Each GTH Quad and its associated reference clock are routed from the FPGA to a connector pad which is designed to interface with a Samtec BullsEye connector. A cable enabled with a BullsEye connector and 10 standard SMAs allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTH Quad, four transmit/receive pairs as well as the two independent reference clocks, enabling the highest level of flexibility in testing custom applications.
VC7215 evaluation board featuring the Virtex-7 XC7VX690T-3FFG1927E FPGA
Full seat Vivado® Design Suite: Design Edition
Node locked & Device-locked to the Virtex-7 XC7VX690T FPGA, with 1 year of updates and support