Tariff Recovery: Please note this part may incur a tariff charge. At checkout, the part will receive a tariff charge. The origin of the part will be determined during shipment and, if applicable, the charge will be removed. For more information regarding tariff recovery, please refer to the Avnet Tariff Resources
DDR/DDR2/DDR3/DDR3L/LPDDR3/DDR4 Termination Regulator 3A 2.375V to 3.5V 10-Pin VSON T/R
The TPS51200 is a sink/source Double Data Rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration.
The TPS51200 maintains a fast transient response and only requires a minimum output capacitance of 20 µF. The TPS51200 supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, and Low Power DDR3/DDR4 VTT bus termination.
In addition, the TPS51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.
The TPS51200 is available in the thermally-efficient SON-10 PowerPAD package, and is rated both Green and Pb-free. It is specified from –40°C to +85°C.
Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
VLDOIN Voltage Range: 1.1 V to 3.5 V
Sink/Source Termination Regulator Includes Droop Compensation
Requires Minimum Output Capacitance of 20-µF (typically 3 × 10-µF MLCCs) for Memory Termination Applications (DDR)
PGOOD to Monitor Output Regulation
REFIN Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider