The TLV320AIC3107 is a low power stereo audio codec with stereo headphone amplifier, and mono class-D speaker driver, as well as multiple inputs and outputs programmable in single-ended or fully differential configurations.
Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 15 mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applications.
The high-power output drivers are capable of driving a variety of load configurations, including up to three channels of single-ended 16-Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a capacitorless output configuration. The mono class-D output is capable of differentially driving an 8-Ω speaker.
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers or AGC that can provide up to 59.5 dB analog gain for low-level microphone inputs. The TLV320AIC3107 provides an extremely high range of programmability for both attack (8-1,408 ms) and for decay (0.05-22.4 seconds). This extended AGC range allows the AGC to be tuned for many types of applications.
For battery saving applications where neither analog nor digital signal processing are required, the device can be put in a special analog signal passthru mode. This mode significantly reduces power consumption, as most of the device is powered down during this pass through operation.
The serial control bus supports I2C protocol, while the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.
The TLV320AIC3107 operates from an analog supply of 2.7 V–3.6 V, a digital core supply of 1.65 V–1.95 V, a digital I/O supply of 1.1 V–3.6 V, and a speaker amplifier supply of 2.7V–5.5V. The device is available in the 5 × 5-mm, 40-pin QFN package and in the future a 3.5 × 3-mm, 42-lead DSBGA package.
The record path of the TLV320AIC3107 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. Programmable filters are available during record which can remove audible noise that can occur during optical zooming in digital cameras. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.
The TLV320AIC3107 contains three high-power output drivers as well as two single-ended line output drivers, and a differential class-D output driver.
Stereo CODEC With Integrated Mono Class-D Amplifier
High Performance Audio DAC
97-dBA Signal-to-Noise Ratio (Single Ended)
Supports Sample Rates From 8 kHz to 96 kHz
Flexible Power Saving Modes and Performance are Available
High Performance Audio ADC
92-dBA Signal-to-Noise Ratio
Supports Rates From 8 kHz to 96 kHz
Digital Signal Processing and Noise Filtering Available During Record
Seven Audio Input Pins
Programmable as 6 Single-Ended or 3 Fully Differential Inputs
Capability for Floating Input Configurations
Multiple Audio Output Drivers
Mono Fully Differential or Stereo Single-Ended Headphone Drivers
Single-Ended Stereo Line Outputs
Mono 1 W Class-D BTL 8Ω Speaker Driver
Low Power Consumption: 15-mW Stereo 48-kHz Playback With 3.3-V Analog Supply
Ultra-Low Power Mode with Passive Analog Bypass
Programmable Input/Output Analog Gains
Automatic Gain Control (AGC) for Record
Programmable Microphone Bias Level
Programmable PLL for Flexible Clock Generation
I2C Control Bus
Audio Serial Data Bus Supports I2S, Left/Right-Justified, DSP, and TDM Modes