SN74ABT534ANE4 by Texas Instruments | Flip Flops | Avnet AMERICAS
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SN74ABT534ANE4

Texas Instruments

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin PDIP Tube

Manufacturer Part #: SN74ABT534ANE4

Avnet Manufacturer Part #: SN74ABT534ANE4


RoHS Compliant

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These 8-bit flip-flops with 3-state outputs are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK), the Q\ outputs are set to the complement of the logic levels set up at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

Key Features

  • State-of-the-Art EPIC-ΙΙBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package

Technical Attributes

Description
Value
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Minimum Operating Supply Voltage
4.5 V
Lead Finish
Gold
Maximum Low Level Output Current
64 mA
Triggering Type
Positive-Edge
Mounting
Through Hole
Supplier Package
PDIP
Maximum High Level Output Current
-32 mA
Output Type
3-State
Polarity
Inverting
Number of Element Outputs
8
Screening Level
Commercial
Fabrication Technology
BiCMOS
Logic Function
D-Type Bus Interface
Number of Output Enables per Element
1
Number of Elements per Chip
1
Number of Element Inputs
8
Maximum Operating Supply Voltage
5.5 V
Propagation Delay Test Condition
50 pF
Product Dimensions
24.33 x 6.35 x 4.57 mm
Bus Hold
No
Pin Count
20
Maximum Propagation Delay Time @ Maximum CL
6.7@5V ns
Output Signal Type
Single-Ended
Number of Channels per Chip
8
Input Signal Type
Single-Ended
Typical Operating Supply Voltage
5 V
Maximum Quiescent Current
30 mA
Operating Temperature
-40 to 85 °C

ECCN / UNSPSC

Description
Value
ECCN:
EAR99
SCHEDULE B:
8542390000

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