The ’HC74 and ’HCT74 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.
This flip-flop has independent DATA, SET\, RESET and CLOCK inputs and Q and Q\ outputs. The logic level present at the data input is transferred to the output during the positive-going transition of the clock pulse. SET\ and RESET are independent of the clock and are accomplished by a low level at the appropriate input.
The HCT logic family is functionally as well as pin compatible with the standard LS logic family.
Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
Asynchronous Set and Reset
Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25°C