74LVC2G74DP-Q100H by Nexperia | Flip Flops | Avnet AMERICAS
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74LVC2G74DP-Q100H

Nexperia

Flip Flop D-Type Pos-Edge 1-Element 8-Pin TSSOP T/R

Manufacturer Part #: 74LVC2G74DP-Q100H

Alternate Part #: 74LVC2G74DP-Q100H


legend RoHS Compliant

Descriptions

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Information

The 74LVC2G74-Q100 is a single positive-edge triggered D-type flip-flop. It has individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing damaging backflow current through the device when it is powered down. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D inputs must be stable, one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. Schmitt trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall times. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant inputs for interfacing with 5 V logic
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Multiple package options

Technical Attributes

Description
Value
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Lead Finish
Gold Over Nickel Palladium
Screening Level
Automotive
Max Processing Temp
260
Typical Operating Supply Voltage
1.8|2.5|3.3|5 V
Pin Count
8
Supplier Package
TSSOP
Maximum High Level Output Current
-32 mA
Output Signal Type
Differential
Maximum Low Level Output Current
32 mA
Logic Function
D-Type
Operating Temperature
-40 to 125 °C
Set/Reset
Set/Reset
MSL Level
1
Triggering Type
Positive-Edge
Number of Channels per Chip
1
Input Signal Type
Single-Ended
Number of Elements per Chip
1
Fabrication Technology
CMOS
Number of Element Inputs
1
Number of Element Outputs
1
Bus Hold
No
Minimum Operating Supply Voltage
1.65 V
Product Dimensions
3.1(Max) x 3 x 0.95(Max)
Maximum Operating Supply Voltage
5.5 V
Maximum Propagation Delay Time @ Maximum CL
3.5@1.65 to 5.5V ns
Mounting
Surface Mount

ECCN / UNSPSC

Description
Value
ECCN:
EAR99
SCHEDULE B:
8542390000
HTSN:
8542390001
UNSPSC:
32101634
UNSPSC VERSION:
V15.1101
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