The IS61LV12816L is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. It is fabricated using high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8ns with low power consumption. When CE\ is HIGH (deselected), the device assumes a standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE\ and OE\. The active LOW Write Enable (WE\) controls both writing and reading of the memory. A data byte allows Upper Byte (UB\) and Lower Byte (LB\) access. The IS61LV12816L is packaged in the JEDEC standard 44-pin TSOP (Type II), 44-pin LQFP, and 48-pin mini BGA (6mm x 8mm).
High-speed access time: 8, 10 ns
Operating Current: 50mA (typ.)
Stand by Current: 700µA (typ.)
TTL and CMOS compatible interface levels
Single 3.3V power supply
Fully static operation: no clock or refresh required