The GSI Technology 288Mb Low Latency DRAM(LLDRAM) II is a high speed memory device designed forhigh address rate data processing typically found in networkingand telecommunications applications. The 8-bank architectureand low tRC allows access rates formerly only found inSRAMs. The Double Data Rate (DDR) I/O interface provides highbandwidth data transfers, clocking out two beats of data perclock cycle at the I/O balls. Source-synchronous clocking canbe implemented on the host device with the provided freerunningdata output clock. Commands, addresses, and control signals are single data ratesignals clocked in by the True differential input clocktransition, while input data is clocked in on both crossings ofthe input data clock(s). Read and Write data transfers always in short bursts. The burstlength is programmable to 2, 4 or 8 by setting the ModeRegister. The device is supplied with 2.5 V VEXT and 1.8 V VDD for thecore, and 1.5 V or 1.8 V for the HSTL output drivers. Internally generated row addresses facilitate bank-scheduledrefresh. The device is delivered in an efficent BGA 144-ball package.
Pin- and function-compatible with Micron RLDRAM® II
533 MHz DDR operation (1.067Gb/s/pin data rate)
38.4 Gb/s peak bandwidth (x36 at 533 MHz clock frequency)
8M x 36, 16M x 18, and 32M x 9 organizations available
8 internal banks for concurrent operation and maximum bandwidth