The SmartLynq Data Cable provides a high-speed connection through Ethernet or USB to a JTAG chain for configuring and debugging Xilinx devices. The cable supports debugging and indirect flash programming of third-party parallel and serial NOR devices through a JTAG port when used with Vivado Hardware Manager, and for debugging embedded software when used with the Xilinx SDK development environment.
The SmartLynq Data Cable supports JTAG data transfer bursts at JTAG clock (TCK) frequencies, selectable from 125 kHz to 40 MHz, and provides a separate 8-bit GPIO port for 8-bit read and write operations to external logic.
Supports JTAG rates up to 40 Mb/s with a voltage range of 1.5 to 3.3V
Offers Ethernet and USB host-side connections
Leverages industry standards, including JTAG boundary-scan IEEE Standard 1149.1 - Test Access Port and Boundary-Scan Architecture
Supports all UltraScale, UltraScale+, and 7 series families as well as Zynq All Programmable (AP) SoCs and Zynq UltraScale+ MPSoCs
Indirectly programs selected serial peripheral interface (SPI) flash memory or parallel flash memory devices via the device’s JTAG port
Offers a 3.3V 8-bit general purpose I/O (GPIO) port
Optimized for use with Xilinx Vivado design tools
Programmable Logic Tools
UltraScale, UltraScale+, 7 Series Families, Zynq SoC, Zynq UltraScale+ MPSoC