The TPS53625 device is a driverless, fully SVID compliant, VR12.0 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS53625 device also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS53625 device integrates the full complement of VR12.0 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 0 to 7. Adjustable control of VOUT slew rate and voltage positioning round out the VR12.0 features.
Paired with the TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS53625 device works with selected TI power stage products for optimum efficiency as well as DrMOS products. The TPS53625 device operates with a default boot voltage of 1 V. Applications can override the default boot voltage by including an external resistor divider in the design.
The TPS53625 device package is a space saving, thermally enhanced 32-pin VQFN package that CPU Applications operates from –40°C to 105°C.
VR12.0 Serial VID (SVID) Compliant
1- or 2-Phase Operation
Supports Both Zero-Load and Non-Zero-Load Line Applications
8-Bit DAC Output Range: 0.25 V to 1.52 V
Optimized Efficiency at Light and Heavy Loads
8 Independent Levels of Overshoot Reduction (OSR) and Undershoot Reduction (USR)
Driverless Configuration for Efficient High-Frequency Switching
Supports Discrete, Power Block, Power Stage™ or DrMOS MOSFET Implementations
Accurate, Adjustable Voltage Positioning
300-kHz to 1-MHz Frequency Selections
Patented AutoBalance™ Phase Balancing
Selectable 8-level Current Limit
4.5-V to 28-V Conversion Voltage Range
Small, 4 mm × 4 mm, 32-Pin, VQFN PowerPad™ Package