This dual two-input positive-OR gate is designed for 1.65-V to 5.5-V collector supply voltage operation.
The SN74LVC2G32-Q1 performs the Boolean function Y = A + B or Y = (A\ • B\)\ in positive logic.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using the off-state current. The off-state current circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
Device HBM ESD Classification Level H2
Device CDM ESD Classification Level C3B
Inputs Accept Voltages to 5.5 V
Max Propagation (Delay) Time of 3.8 ns at 3.3 V
Low Power Consumption, 10-µA Max Supply Current
±24-mA Output Drive at 3.3 V
Typical Voltage Output Low Peak (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
Typical Voltage Output High Valley (VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
Ioff State Current Supports Partial-Power-Down Mode Operation