These octal transparent D-type latches are designed for 2.7-V to 5.5-V VCC operation.
The 'LV573 feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
OEdoes not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN74LV573 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LV573 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LV573 is characterized for operation from -40°C to 85°C.