The RM46Lx30deviceis a high-performance microcontroller family forsafety systems. The safety architecture includesdual CPUs in lockstep, CPUand memory BIST logic, ECC on both the flash and the data SRAM, parityonperipheral memories, and loopback capability on peripheral I/Os.
The RM46Lx30deviceintegrates the ARM Cortex-R4Ffloating-point CPU which offers an efficient 1.66 DMIPS/MHz, andcan run up to 200 MHzprovidingup to 332 DMIPS.The device supports the little-endian [LE] format.
The RM46L830devicehas 1.25MB of integratedflash and 192KB ofdata RAM with single-bit error correction and double-bit error detection. TheRM46L430device has 1MBof integrated flash and 128KB of data RAM withsingle-bit error correction and double-bit errordetection. The flash memoryon this device is a nonvolatile, electrically erasable andprogrammablememory, implemented with a 64-bit-wide data bus interface. The flash operates ona3.3-V supply input (same level as I/O supply) for all read, program, anderase operations. When inpipeline mode, the flash operates with a systemclock frequency of up to 200 MHz. The SRAMsupports single-cycle read andwrite accesses in byte, halfword, word, and double-word modesthroughout thesupported frequency range.
The RM46Lx30devicefeatures peripherals for real-time control-basedapplications, includingtwo Next Generation High-End Timer (N2HET) timing coprocessorswith up to 44 I/O terminals, seven Enhanced Pulse WidthModulator (ePWM) modules with up to 14outputs, six Enhanced Capture (eCAP)modules, two Enhanced Quadrature Encoder Pulse (eQEP) modules,and two 12-bitAnalog-to-Digital Converters (ADCs) supporting up to 24 inputs.
The N2HET is an advanced intelligent timer that provides sophisticated timingfunctionsfor real-time applications. The timer is software-controlled, usinga reduced instruction set, witha specialized timer micromachine and anattached I/O port. The N2HET can be used forpulse-width-modulated outputs,capture or compare inputs, or general-purpose I/O (GIO). The N2HETisespecially well suited for applications requiring multiple sensor informationand driveactuators with complex and accurate time pulses. A High-End TimerTransfer Unit (HTU) can performDMA-type transactions to transfer N2HET datato or from main memory. A Memory Protection Unit (MPU)is built into theHTU.
TheePWM module can generate complex pulse width waveforms with minimalCPU overhead or intervention.The ePWM is easy to use and it supports bothhigh-side and low-side PWM and deadband generation.With integrated trip zoneprotection and synchronization with the on-chip MibADC, the ePWM moduleisideal for digital motor control applications.
TheeCAP module is essential in systems where the accurately timed captureof external events isimportant. The eCAP can also be used to monitor theePWM outputs or for simple PWM generation whenthe eCAP is not needed forcapture applications.
TheeQEP module is used for direct interface with a linear or rotaryincremental encoder to getposition, direction, and speed information from arotating machine as used in high-performancemotion and position-controlsystems.
The device hastwo12-bit-resolutionMibADCs with24 total inputsand 64 wordsof parity-protected buffer RAM each. The MibADC channels can beconverted individually or can begrouped by software for sequentialconversion sequences.Sixteeninputs are shared between the two MibADCs.Each MibADC supports three separate groupings ofchannels. Each group can beconverted once when triggered or configured for continuous conversionmode. The MibADC has a 10-bit mode for use when compatibility with older devices orfaster conversiontime is desired.MibADC1 also supports the use ofexternal analog multiplexers.
High-Performance Microcontroller for Safety-Critical Applications
Dual CPUs Running inLockstep
ECC on Flash and RAM Interfaces
Built-In Self-Test(BIST) for CPU and On-chip RAMs
Error Signaling Module With ErrorPin
Voltage and Clock Monitoring
ARM Cortex-R4F 32-Bit RISC CPU
1.66 DMIPS/MHz With8-Stage Pipeline
FPU With Single- andDouble-Precision
12-Region Memory Protection Unit (MPU)
OpenArchitecture With Third-Party Support
Up to 200-MHz System Clock
Core Supply Voltage (VCC): 1.14 to 1.32V
I/O Supply Voltage (VCCIO): 3.0 to 3.6V
1.25MB of Program Flash WithECC (RM46L830)
1MB ofProgram Flash With ECC (RM46L430)
192KB of RAM With ECC (RM46L830)
128KB of RAM With ECC (RM46L430)
64KB of Flash for Emulated EEPROM WithECC
16-Bit External Memory Interface (EMIF)
Common Platform Architecture
Consistent Memory Map AcrossFamily
Real-Time Interrupt (RTI) Timer (OSTimer)
128-Channel Vectored Interrupt Module(VIM)
2-Channel Cyclic Redundancy Checker (CRC)
Direct Memory Access (DMA) Controller
16 Channels and32 Peripheral Requests
Parity Protection for Control PacketRAM
DMA Accesses Protected by DedicatedMPU
Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In SlipDetector
Separate Nonmodulating PLL
IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components
Advanced JTAG Security Module (AJSM)
Parameter Overlay Module(POM)
16 General-Purpose Input/Output (GPIO) Pins Capable of GeneratingInterrupts
Enhanced Timing Peripherals for Motor Control
7 Enhanced Pulse Width Modulator (ePWM)Modules
6 Enhanced Capture (eCAP) Modules
2 EnhancedQuadrature Encoder Pulse (eQEP) Modules
Two Next Generation High-End Timer (N2HET) Modules
N2HET1: 32 ProgrammableChannels
N2HET2: 18 Programmable Channels
160-WordInstruction RAM Each With Parity Protection
Each N2HET Includes Hardware AngleGenerator
Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC)Modules
ADC2:16 Channels Shared With ADC1
64 Result Buffers Each With Parity Protection
Multiple Communication Interfaces
2-Port USB Host Controller
One Full-SpeedUSB Device Port
Three CAN Controllers (DCANs)
64 MailboxesEach With Parity Protection
Compliant to CAN Protocol Version 2.0A and2.0B
Three Multibuffered Serial PeripheralInterface (MibSPI) Modules
128 Words Each With ParityProtection
8 Transfer Groups
Upto Two Standard Serial Peripheral Interface (SPI) Modules
Two UART (SCI)Interfaces, One With Local Interconnect Network (LIN2.1) InterfaceSupport