The DS110DF410 is a four channel retimer with integrated signal conditioning. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), self calibrating 5-tap Decision Feedback Equalizer (DFE), Clock and Data Recovery (CDR), and transmit De-Emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1×10–15.
Each channel can independently lock to data rates from 8.5 to 11.3 Gbps, and associated sub rates (div by 2, 4 and 8) to support a variety of communication protocols. A 25-MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.
The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.
Each Channel Independently Locks to Data Rates from 8.5 to 11.3 Gbps and Sub-rates
Support for Subrates of Divide by 2/4/8
Fast Lock Operation Based on Protocol-Select Mode
Low Latency (∼300ps)
Adaptive Equalization up to 34-dB Boost at 5 GHz
Adjustable Transmit VOD: 600 to 1300 mVp-p
Adjustable Transmit De-emphasis to –12 dB
Typical Power Dissipation (EQ+DFE+CDR+DE): 180 mW/Channel
Programmable Output Polarity Inversion
Input Signal Detection, CDR Lock Detection/Indicator
On-Chip Eye Monitor (EOM), PRBS Generator
Single 2.5-V ±5% Power Supply
SMBus/EEPROM Configuration Modes
Operating Temperature Range of –40 to 85°C
WQFN 48-Pin 7-mm × 7-mm Package
Easy Pin Compatible Upgrade Between Repeater and Retimers