These Dual P-Channel logic level enhancement mode field effect transistors are produced using Fairchild 's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors in load switching applications. Since bias resistors are not required this one P-Channel FET can replace several digital transistors with different bias resistors like the IMBx A series.
-25 V, -0.1 2 A continuous, -0.5 A Peak.
R DS(ON) = 13 Ω @ V GS = - 2.7 V
R DS(ON) = 10 Ω @ V GS = -4.5 V
Very low level gate drive requirements allowing direct operation in 3V circuits. V GS(th) < 1.5 V.
Gate-Source Zener for ESD ruggedness . >6 kV Human Body Model
Replace multiple PNP digital transistors (IMHx A series) with one DMOS FET.