The 16Mb Synchronous DRAM IS42/4516100H is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.
Clock frequency: 200, 166, 143 MHz
Fully synchronous; all signals referenced to a positive Clock edge
Two banks can be operated simultaneously and independently
Dual internal bank controlled by A11 (bank select)