The IDT71V124 is a 1,048,576-bit high-speed static RAM organizedas 128K x 8. It is fabricated using high-performance, high-reliability CMOStechnology. This state-of-the-art technology, combined with innovativecircuit design techniques, provides a cost-effective solution for high-speedmemory needs. The JEDEC center power/GND pinout reduces noisegeneration and improves system performance. The IDT71V124 has an output enable pin which operates as fast as5ns, with address access times as fast as 10ns available. All bidirectionalinputs and outputs of the IDT71V124 are LVTTL-compatible and operationis from a single 3.3V supply. Fully static asynchronous circuitry is used;no clocks or refreshes are required for operation.
128K x 8 advanced high-speed CMOS static RAM
JEDEC revolutionary pinout (center power/GND) for reduced noise
Equal access and cycle times
One Chip Select plus one Output Enable pin
Inputs and outputs are LVTTL-compatible
Single 3.3V supply
Low power consumption via chip deselect
Available in a 32-pin 300- and 400-mil Plastic SOJ, and 32-pin Type II TSOP packages.