The Neuron 5000 Processor includes 3 independent 8-bit logical processors to manage the physical MAC layer, the network, and the user application. These are called the Media-Access Control (MAC) processor, the network (NET) processor, and the application (APP) processor, respectively. At higher system clock rates, there is also a fourth processor to handle interrupts.
Higher-performance Neuron® Core -internal system clock scales up to 80 MHz.
Enables lower-cost device designs.
Serial memory interface for inexpensive external EEPROM and flash non-volatile memories.
Supports up to 254 Network Variables (NVs) and 127 aliases.
User programmable interrupts provide faster response time to external events.
Includes hardware UART with 16-byte receive and transmit FIFOs.
7mm x 7mm 48-pin QFN package.
5-pin network communications port with 3.3V drive and 5V-tolerant pins.
12 I/O pins with 35 programmable standard I/O models.
Supports up to 42KB of application code space.
64KB RAM (44KB user accessible) and 16KB ROM on-chip memories.
Unique 48-bit Neuron ID in every device for network installation and management.