M74VHCT126ADTR2G by ON Semiconductor | Buffer and Line Driver | Avnet EMEA
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M74VHCT126ADTR2G

ON Semiconductor

Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R

Manufacturer Part #: M74VHCT126ADTR2G

Alternate Part #: M74VHCT126ADTR2G


legend RoHS Compliant

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Information

The MC74VHCT126A is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves noninverting high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.The MC74VHCT126A requires the 3-state control input (OE) to be set Low to place the output into high impedance.The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS level output swings.The VHCT126A input structures provide protection when voltages between 0V and 5.5V are applied, regardless of the supply voltage. The output structures also provide protection when V = 0V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

Key Features

  • High Speed: tPD = 3.8ns (Typ) at VCC = 5V
  • Low Power Dissipation: ICC = 4mA (Max) at TA = 25°C
  • TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V
  • Power Down Protection Provided on Inputs
  • Balanced Propagation Delays
  • Designed for 2V to 5.5V Operating Range
  • Low Noise: VOLP = 0.8V (Max)
  • Pin and Function Compatible with Other Standard Logic Families
  • Latchup Performance Exceeds 300mA
  • ESD Performance: HBM > 2000V; Machine Model > 200V
  • Chip Complexity: 72 FETs or 18 Equivalent Gates
  • Pb-Free Packages are Available

Technical Attributes

Description
Value
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Maximum High Level Output Current
-8 mA
Number of Output Enables per Chip
4 High
Mounting
Surface Mount
Bus Hold
No
Maximum Propagation Delay Time @ Maximum CL
11.5@3.3V|7.5@5V ns
Minimum Operating Supply Voltage
4.5 V
Logic Function
Buffer/Line Driver
Number of Outputs per Chip
4
Number of Channels per Chip
4
Polarity
Non-Inverting
Maximum Operating Supply Voltage
5.5 V
Typical Operating Supply Voltage
5 V
Maximum Quiescent Current
2 uA
Maximum Low Level Output Current
8 mA
Number of Inputs per Chip
4
Output Type
3-State
Number of Elements per Chip
4
Max Processing Temp
260
Lead Finish
Gold
Operating Temperature
-40 to 85 °C
Fabrication Technology
CMOS
Input Signal Type
Single-Ended
Propagation Delay Test Condition
50 pF

ECCN / UNSPSC

Description
Value
ECCN:
EAR99
SCHEDULE B:
8542390000
HTSN:
8542390000
UNSPSC:
32101600
UNSPSC VERSION:
V15.1101
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EUR    €0,2339
  • Lead time: 16 weeks
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