SN74CB3Q3306APWR by Texas Instruments | APACBus Switch | Avnet ASIA

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SN74CB3Q3306APWR

Texas Instruments

Bus Switch 2-Element CMOS 2-IN 8-Pin TSSOP T/R

製造商產品編號: SN74CB3Q3306APWR

替代料號: SN74CB3Q3306APWR


legend 通過RoHS認證

描述

文檔

替代/替換

資料

The SN74CB3Q3306 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage ofthe pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allowsfor minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The devicealso features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.

Specifically designed to support high-bandwidth applications, the SN74CB3Q3306A provides an optimizedinterface solution ideally suited for broadband communications, networking, and data-intensive computingsystems.

技術參數

  • High-Bandwidth Data Path (up to 500 MHz(1)) Clamp Diodes
  • Low Power Consumption (ICC = 0.25 mA Typ)
  • 5-V-Tolerant I/Os With Device Powered Up or Powered Down
  • VCC Operating Range From 2.3 V to 3.6 V
  • Low and Flat ON-State Resistance (ron)
  • Data I/Os Support 0- to 5-V Signaling Levels Characteristics Over Operating Range (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V) (ron = 4 Ω Typ)
  • Control Inputs Can Be Driven by TTL or
  • Rail-to-Rail Switching on Data I/O Ports 5-V/3.3-V CMOS Outputs
    • 0- to 5-V Switching With 3.3-V VCC
  • Ioff Supports Partial-Power-Down Mode
    • 0- to 3.3-V Switching With 2.5-V V Operation CC
  • Bidirectional Data Flow With Near-Zero
  • Latch-Up Performance Exceeds 100 mA Propagation Delay Per JESD 78, Class II
  • Low Input/Output Capacitance Minimizes
  • ESD Performance Tested Per JESD 22 Loading and Signal Distortion – 2000-V Human-Body Model (Cio(OFF) = 3.5 pF Typ) (A114-B, Class II)
  • Fast Switching Frequency (f OE = 20 MHz Max)

技術屬性

描述
尋找類似物料
Lead Finish
Matte Tin
Operating Temperature
-40 to 85 °C
Propagation Delay Test Condition
50 pF
Mounting
Surface Mount
Product Dimensions
3 x 4.4 x 1 mm
Pin Count
8
Maximum High Level Output Current
-64 mA
Typical Quiescent Current
250 uA
Number of Inputs per Chip
2
Typical Operating Supply Voltage
2.5|3.3 V
Number of Elements per Chip
2
Number of Outputs per Chip
2
Supplier Package
TSSOP
Configuration
1 x 1:1
Minimum Operating Supply Voltage
2.3 V
Maximum Quiescent Current
700 uA
Maximum Low Level Output Current
64 mA
Fabrication Technology
CMOS
Maximum Operating Supply Voltage
3.6 V
Max Processing Temp
260
MSL Level
1
Logic Function
Bus Switch
Maximum Propagation Delay Time @ Maximum CL
0.2@3.3V ns
Maximum On Resistance
5 Ohm

ECCN/UNSPSC

描述
ECCN:
EAR99
計劃交貨期 B:
8542310000"
HTSN:
8542310000"
UNSPSC:
32101600
UNSPSC VERSION:
V15.1101

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