DS90CR215MTDXNOPB by Texas Instruments | APACLVDS | Avnet ASIA
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信息

DS90CR215MTDXNOPB

Texas Instruments

LVDS 0.45V 48-Pin TSSOP T/R

製造商產品編號: DS90CR215MTDXNOPB

替代料號: DS90CR215MTDX/NOPB


通過RoHS認證

描述

文檔

替代/替換

資料

The DS90CR215 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CR216 receiver converts the LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 66 MHz, 21 bits of TTL data are transmitted at a rate of 462 Mbps per LVDS data channel. Using a 66 MHz clock, the data throughput is 1.386 Gbit/s (173 Mbytes/s).

The multiplexing of the data lines provides a substantial cable reduction. Long distance parallel single-ended buses typically require a ground wire per active signal (and have very limited noise rejection capability). Thus, for a 21-bit wide data and one clock, up to 44 conductors are required. With the Channel Link chipset as few as 9 conductors (3 data pairs, 1 clock pair and a minimum of one ground) are needed. This provides a 80% reduction in required cable width, which provides a system cost savings, reduces connector physical size and cost, and reduces shielding requirements due to the cables' smaller form factor.

The 21 CMOS/TTL inputs can support a variety of signal combinations. For example, five 4-bit nibbles plus 1 control, or two 9-bit (byte + parity) and 3 control.

 

技術參數

  • Single +3.3V Supply
  • Chipset (Tx + Rx) Power Consumption <250 mW (typ)
  • Power-down Mode (<0.5 mW total)
  • Up to 173 Megabytes/sec Bandwidth
  • Up to 1.386 Gbps Data Throughput
  • Narrow Bus Reduces Cable Size
  • 290 mV Swing LVDS Devices for Low EMI
  • +1V Common Mode Range (Around +1.2V)
  • PLL Requires No External Components
  • Low Profile 48-Lead TSSOP Package
  • Rising Edge Data Strobe
  • Compatible with TIA/EIA-644 LVDS Standard
  • ESD Rating > 7 kV
  • Operating Temperature: −40°C to +85°C
  • 技術屬性

    描述
    尋找類似物料
    Maximum Differential Output Voltage
    0.45 V
    Differential Input Low Threshold Voltage
    -0.1 V
    Transmission Data Rate
    1386 Mbps
    Maximum Operating Supply Voltage
    3.6 V
    Pin Count
    48
    Maximum Input Current
    10 uA
    MSL Level
    2
    Product Dimensions
    12.5 x 6.1 x 0.9 mm
    Number of Drivers
    3
    Typical Operating Supply Voltage
    3.3 V
    Differential Input High Threshold Voltage
    0.1 V
    Mounting
    Surface Mount
    Maximum Power Dissipation
    1980 mW
    Max Processing Temp
    260
    Supplier Package
    TSSOP
    Lead Finish
    Tin
    Number of Receivers
    21
    Number of Elements per Chip
    3
    Minimum Operating Supply Voltage
    3 V
    Operating Temperature
    -40 to 85 °C
    Input Type
    CMOS|TTL

    ECCN/UNSPSC

    描述
    ECCN:
    5A991.b.1
    計劃交貨期 B:
    8542390000
    UNSPSC:
    32101600
    UNSPSC VERSION:
    V15.1101

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