DP83849IDVS/NOPB by Texas Instruments | APACPHY | Avnet ASIA
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信息

DP83849IDVS/NOPB

Texas Instruments

PHY 2-CH 10Mbps/100Mbps 80-Pin TQFP Tray

製造商產品編號: DP83849IDVS/NOPB

替代料號: DP83849IDVS/NOPB


legend 通過RoHS認證

描述

文檔

替代/替換

資料

The number of applications requiring Ethernet Connectivity continues to expand. Along with this increased market demand is a change in application requirements. Where single channel Ethernet used to be sufficient, many applications such as wireless remote base stations and industrial networking now require DUAL Port functionality for redundancy or system management.

The DP83849ID is a highly reliable, feature rich device perfectly suited for industrial applications enabling Ethernet on the factory floor. The DP83849ID features two fully independent 10/100 ports for multi-port applications.

The DP83849ID provides optimum flexibility in MPU selection by supporting both MII and RMII interfaces. The device also provides flexibility by supporting both copper and fiber media.

In addition this device includes a powerful new diagnostics tool to ensure initial network operation and maintenance. In addition to the TDR scheme, commonly used for detecting faults during installation, NATIONAL's innovative cable diagnostics provides for real time continuous monitoring of the link quality. This allows the system designer to implement a fault prediction mechanism to detect and warn of changing or deteriorating link conditions.

With the DP83849ID, National Semiconductor continues to build on its Ethernet expertise and leadership position by providing a powerful combination of features and flexibility, easing Ethernet implementation for the system designer.

技術參數

  • Low-power 3.3V, 0.18μm CMOS technology
  • Low power consumption <600mW Typical
  • 3.3V MAC Interface
  • Auto-MDIX for 10/100 Mb/s
  • Energy Detection Mode
  • Dynamic Integrity Utility
  • Dynamic Link Quality Monitoring
  • TDR based Cable Diagnostic and Cable Length Detection
  • Optimized Latency for Real Time Ethernet Operation
  • Reference Clock out
  • RMII Rev. 1.2 Interface (configurable)
  • SNI Interface (configurable)
  • MII Serial Management Interface (MDC and MDIO)
  • IEEE 802.3u MII
  • IEEE 802.3u Auto-Negotiation and Parallel Detection
  • IEEE 802.3u ENDEC, 10BASE-T transceivers and filters
  • IEEE 802.3u PCS, 100BASE-TX transceivers and filters
  • IEEE 802.3u 100BASE-FX Fiber Interface
  • IEEE 1149.1 JTAG
  • Integrated ANSI X3.263 compliant TP-PMD physical sub-layer with adaptive equalization and Baseline Wander compensation
  • Programmable LED support for Link, 10 /100 Mb/s Mode, Activity, Duplex and Collision Detect
  • Single register access for complete PHY status
  • 10/100 Mb/s packet BIST (Built in Self Test)
  • 80-pin TQFP package (12mm x 12mm)
  • 技術屬性

    描述
    尋找類似物料
    Maximum Single Supply Voltage
    3.6 V
    Number of Channels per Chip
    2
    Max Processing Temp
    260
    Mounting
    Surface Mount
    Standard Supported
    100BASE-FX|100BASE-TX|10BASE-T
    Lead Finish
    Tin
    Integrated CDR
    No
    Maximum Data Rate
    100 Mbps
    Product Dimensions
    12 x 12 x 1 mm
    Overhead Octet Support
    No
    JTAG Support
    Yes
    MSL Level
    3
    PHY Line Side Interface
    No
    Minimum Single Supply Voltage
    3 V
    Supplier Package
    TQFP
    Pin Count
    80
    UTOPIA Level
    No

    ECCN/UNSPSC

    描述
    ECCN:
    EAR99
    計劃交貨期 B:
    8542.2129-00
    HTSN:
    8542.2129-00
    UNSPSC:
    32101600
    UNSPSC VERSION:
    V15.1101

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