DP83630SQ/NOPB by Texas Instruments | APACPHY | Avnet ASIA

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信息

DP83630SQ/NOPB

Texas Instruments

PHY 1-CH 10Mbps/100Mbps 48-Pin LLP EP T/R

製造商產品編號: DP83630SQ/NOPB

替代料號: DP83630SQ/NOPB


legend 通過RoHS認證

描述

文檔

替代/替換

資料

The DP83630 Precision PHYTER device delivers the highest level of precision clock synchronization for real time industrial connectivity based on the IEEE 1588 standard. The DP83630 has deterministic, low latency and allows choice of microcontroller with no hardware customization required. The integrated 1588 functionality allows system designers the flexibility and precision of a close to the wire timestamp. The three key 1588 features supported by the device are:

— Packet time stamps for clock synchronization

— Integrated IEEE 1588 synchronized low jitter clock generation

— Synchronized event triggering and time stamping through GPIO

DP83630 offers innovative diagnostic features unique to Texas Instruments, including dynamic monitoring of link quality during standard operation for fault prediction. These advanced features allow the system designer to implement a fault prediction mechanism to detect and warn of deteriorating and changing link conditions. This single port fast Ethernet transceiver can support both copper and fiber media.

技術參數

  • IEEE 1588 V1 and V2 Supported
  • UDP/IPv4, UDP/IPv6, and Layer2Ethernet Packets Supported
  • IEEE 1588 ClockSynchronization
  • Selectable Frequency Synchronized Low Jitter ClockOutput
  • Timestamp Resolution of 8 ns
  • Allows Sub 10 nsSynchronization to Master Reference
  • 12 IEEE 1588 GPIOs for Trigger orCapture
  • Deterministic, Low Transmit and ReceiveLatency
  • Dynamic Link Quality Monitoring
  • TDR Based CableDiagnostic and Cable Length Detection
  • 10/100 Mb/s Packet BIST (Built in SelfTest)
  • Error-Free Operation up to 150 Meters CAT5Cable
  • ESD Protection - 8 kV Human Body Model
  • 2.5 V and 3.3V I/Os and MAC Interface
  • Auto-MDIX for 10/100Mbps
  • Auto-Crossover in Forced Modes of Operation
  • RMII Rev.1.2 and MII MAC Interface
  • RMII Master Mode
  • 25 MHz MDC andMDIO Serial Management Interface
  • IEEE 802.3u 100BASE-FX FiberInterface
  • IEEE 1149.1 JTAG
  • Programmable LED Support forLink, 10 /100 Mb/s Mode, Duplex, Activity, and Collision Detect
  • Optional100BASE-TX Fast Link-Loss Detection
  • Industrial TemperatureRange
  • 48 Pin WQFN Package (7mm) x (7mm)
  • 技術屬性

    描述
    尋找類似物料
    Lead Finish
    Matte Tin
    Maximum Data Rate
    100 Mbps
    Product Dimensions
    7 x 7 x 0.8 mm
    Maximum Single Supply Voltage
    3.6 V
    Supplier Package
    LLP EP
    MSL Level
    2
    Overhead Octet Support
    No
    Standard Supported
    100BASE-FX|IEEE 802.3u|IEEE 1149.1
    Max Processing Temp
    260
    Pin Count
    48
    PHY Line Side Interface
    No
    Maximum Supply Current
    105 mA
    Integrated CDR
    Yes
    Mounting
    Surface Mount
    Number of Channels per Chip
    1
    Minimum Single Supply Voltage
    3 V
    JTAG Support
    Yes

    ECCN/UNSPSC

    描述
    ECCN:
    5A991.b.1
    計劃交貨期 B:
    8542390000"
    HTSN:
    8542390001"
    UNSPSC:
    32101600
    UNSPSC VERSION:
    V15.1101

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