MC14517BDWR2G by ON Semiconductor | APACCounter Shift Register | Avnet ASIA
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信息

MC14517BDWR2G

ON Semiconductor

Shift Register Dual 64-Bit Serial to Parallel 16-Pin SOIC W T/R

製造商產品編號: MC14517BDWR2G

替代料號: MC14517BDWR2G


legend 通過RoHS認證

描述

文檔

替代/替換

資料

The MC14517B dual 64-bit static shift register consists of two identical, independent, 64-bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, regardless of the state of the write enable input. An output is disabled (open circuited) when the write enable input is high. During this time, data appearing at the data input as well as the 16-bit, 32-bit, and 48-bit taps may be entered into the device by application of a clock pulse. This feature permits the register to be loaded with 64 bits in 16 clock periods, and also permits bus logic to be used. This device is useful in time delay circuits, temporary memory storage circuits, and other serial shift register applications.

技術參數

  • Diode Protection on All Inputs
  • Fully Static Operation
  • Output Transitions Occur on the Rising Edge of the Clock Pulse
  • Exceedingly Slow Input Transition Rates May Be Applied to the Clock Input
  • 3-State Output at 64th-Bit Allows Use in Bus Logic Applications
  • Shift Registers of any Length may be Fully Loaded with 16 Clock Pulses
  • Supply Voltage Range = 3.0 Vdc to 18 Vdc
  • Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
  • Pb-Free Packages are Available

技術屬性

描述
尋找類似物料
Propagation Delay Test Condition
50 pF
Number of Element Outputs
4
Mounting
Surface Mount
Triggering Type
Positive-Edge
Maximum Propagation Delay Time @ Maximum CL
770@5V|300@10V|215@15V ns
Number of Elements per Chip
2
Output Type
3-State
Operating Temperature
-55 to 125 °C
Supplier Package
SOIC W
Number of Element Inputs
1
Logic Function
Shift Register
MSL Level
3
Parallel Enable Input
No
Maximum Operating Supply Voltage
18 V
Lead Finish
Matte Tin
Terminal Count Output
No
Typical Operating Supply Voltage
3.3|5|9|12|15 V
Operation Mode
Serial to Parallel
Maximum Quiescent Current
0.02 mA
Direction Type
Uni-Directional
Pin Count
16
Number of Stages
64
Fabrication Technology
CMOS
Max Processing Temp
260
Product Dimensions
10.45 x 7.6 x 2.4 mm
Minimum Operating Supply Voltage
3 V

ECCN/UNSPSC

描述
ECCN:
EAR99
計劃交貨期 B:
8504.4091-09
HTSN:
8504.4091-09
UNSPSC:
32101635
UNSPSC VERSION:
V15.1101
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