SN74AVCH8T245PWR by Texas Instruments | APACBus Driver/Transceiver | Avnet ASIA
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SN74AVCH8T245PWR

Texas Instruments

Bus XCVR Single 8-CH 3-ST 24-Pin TSSOP T/R

制造商料号#: SN74AVCH8T245PWR

替代型号#: SN74AVCH8T245PWR


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描述

文档

替代/替换

信息

This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVCH8T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH8T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCH8T245 is designed so the control pins (DIR and OE) are supplied by VCCA.

The SN74AVCH8T245 solution is compatible with a single-supply system and can be replaced later with a '245 function, with minimal printed circuit board redesign.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

技术参数

  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • VCC Isolation Feature — If Either VCC Input Is at GND, All I/O Ports Are in the High-Impedance State
  • Ioff Supports Partial-Power-Down Mode Operation
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
  • I/Os Are 4.6-V Tolerant
  • Max Data Rates:
    • 320 Mbps (VCCA ≤ 1.8 V and VCCB ≤ 1.8 V)
    • 170 Mbps (VCCA ≥ 1.8 V or VCCB ≥ 1.8 V)
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • 技术特性

    描述
    寻找类似物料
    Maximum Operating Supply Voltage
    3.6 V
    Maximum Propagation Delay Time @ Maximum CL
    6.8@1.5V@3.3V ns
    Tolerant I/Os
    4.6 V
    Fabrication Technology
    CMOS
    Number of Elements per Chip
    1
    Maximum High Level Output Current
    -12 mA
    MSL Level
    1
    Logic Function
    Bus Transceiver with Voltage Translation
    Product Dimensions
    7.9 x 4.5 x 1.05 mm
    Number of Channels per Chip
    8
    Typical Operating Supply Voltage
    1.8|2.5|3.3 V
    Lead Finish
    Gold
    Mounting
    Surface Mount
    Data Flow Direction
    Bi-Directional
    Bus Hold
    Yes
    Input Level
    CMOS
    Output Type
    3-State
    Propagation Delay Test Condition
    15 pF
    Minimum Operating Supply Voltage
    1.2 V
    Supplier Package
    TSSOP
    Polarity
    Non-Inverting
    Number of Output Enables per Element
    1 Low
    Number of Direction Control Inputs
    1 Low/High
    Maximum Quiescent Current
    16 uA
    Maximum Low Level Output Current
    12 mA
    Output Level
    CMOS
    Pin Count
    24
    Operating Temperature
    -40 to 85 °C
    Max Processing Temp
    260

    ECCN / UNSPSC

    描述
    ECCN:
    EAR99
    计划交货期 B:
    8542310000"
    UNSPSC:
    32101654
    UNSPSC VERSION:
    V15.1101

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