MC74LCX573DTG by ON Semiconductor | APACLatches | Avnet ASIA
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MC74LCX573DTG

ON Semiconductor

Latch Transparent 3-ST 8-CH D-Type 20-Pin TSSOP Rail

制造商料号#: MC74LCX573DTG

替代型号#: MC74LCX573DTG


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描述

文档

替代/替换

信息

The MC74LCX573 is a high performance, non-inverting octal transparent latch operating from a 2.3 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A V specification of 5.5V allows MC74LCX573 inputs to be safely driven from 5V devices.The MC74LCX573 contains 8 D-type latches with 3-state standard outputs. When the Latch Enable (LE) input is HGH, data on the Dn inputs enters the latches. n this condition, the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HGH-to-LOW transition of LE. The 3-state standard outputs are controlled by the Output Enable (OEbar) input. When OEbar is LOW, the standard outputs are enabled. When OEbar is HGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches. The LCX573 flow through design facilitates easy PC board layout.

技术参数

  • Designed for 2.3 to 3.6V VCC Operation
  • 5V Tolerant - Interface Capability With 5V TTL Logic
  • Supports Live Insertion and Withdrawal
  • IOFF Specification Guarantees High Impedance When VCC = 0V
  • LVTTL Compatible
  • LVCMOS Compatible
  • 24mA Balanced Output Sink and Source Capability
  • Near Zero Static Supply Current in All Three Logic States (10mA) Substantially Reduces System Power Requirements
  • Latchup Performance Exceeds 500mA
  • ESD Performance: Human Body Model >2000V; Machine Model >200V
  • Pb-Free Packages are Available*

技术特性

描述
寻找类似物料
Set/Reset
No
Lead Finish
Gold
Maximum Quiescent Current
10 uA
Maximum Low Level Output Current
24 mA
Product Dimensions
6.6 x 4.5 x 1.05 mm
Latch Mode
Transparent
Number of Outputs per Chip
8
Number of Channels per Chip
8
Output Type
3-State
Bus Hold
No
Number of Input Enables per Element
1
Typical Operating Supply Voltage
2.5|3.3 V
Number of Inputs per Chip
8
Number of Output Enables per Element
1
Maximum High Level Output Current
-24 mA
Type
D-Type
Fabrication Technology
CMOS
Minimum Operating Supply Voltage
2 V
Number of Elements per Chip
1
Maximum Operating Supply Voltage
3.6 V

ECCN / UNSPSC

描述
ECCN:
EAR99
计划交货期 B:
8541.31.00.00.2
HTSN:
8541.31.00.00.2
UNSPSC:
32101600
UNSPSC VERSION:
V15.1101
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