MC14526BDWR2G by ON Semiconductor | APACCounter Shift Register | Avnet ASIA
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MC14526BDWR2G

ON Semiconductor

Counter/Divider Single 4-Bit Async Binary Down 16-Pin SOIC W T/R

制造商料号#: MC14526BDWR2G

替代型号#: MC14526BDWR2G


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描述

文档

替代/替换

信息

The MC14526B binary counter is constructed with MOS P-channel and N-channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded "0" state output for divide-by-N applications. In single stage applications the "0" output is applied to the Preset Enable input. The Cascade Feedback input allows cascade divide-by-N operation with no additional gates required. The Inhibit input allows disabling of the pulse counting function. Inhibit may also be used as a negative edge clock. This complementary MOS counter can be used in frequency synthesizers, phase-locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity.

技术参数

  • Supply Voltage Range = 3.0 Vdc to 18 Vdc
  • Logic Edge-Clocked Design - Incremented on Positive Transition of Clock or Negative Transition of Inhibit
  • Asynchronous Preset Enable
  • Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
  • Pb-Free Packages are Available

技术特性

描述
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Triggering Type
Positive-Edge/Negative-Edge
Operation Mode
Down Counter
Maximum Operating Supply Voltage
18 V
Product Dimensions
10.45 x 7.6 x 2.4 mm
Supplier Package
SOIC W
Mounting
Surface Mount
Max Processing Temp
260
Reset Type
Asynchronous
Direction Type
Uni-Directional
Pin Count
16
Lead Finish
Matte Tin
Preset Type
Asynchronous
Minimum Operating Supply Voltage
3 V
Maximum Quiescent Current
0.02 mA
Fabrication Technology
CMOS
Number of Element Inputs
4
Type
Binary
Terminal Count Output
Yes
Number of Stages
4
Typical Operating Supply Voltage
3.3|5|9|12|15 V
Operating Temperature
-55 to 125 °C
Logic Function
Counter/Divider
Propagation Delay Test Condition
50 pF
Number of Element Outputs
4
Number of Elements per Chip
1
Parallel Enable Input
Yes
MSL Level
3
Maximum Propagation Delay Time @ Maximum CL
1100@5V|450@10V|320@15V ns

ECCN / UNSPSC

描述
ECCN:
EAR99
计划交货期 B:
8542.2129-00
HTSN:
8542.2129-00
UNSPSC:
32101635
UNSPSC VERSION:
V15.1101
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