The 25LC640A are 64 Kbit serial Electrically Erasable PROMs. The memory is accessed via a simple serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input.
Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.
The 25XX640A is available in standard packages including 8-lead PDIP and SOIC, and advanced packaging including 8-lead MSOP, 8-lead TSSOP, DFN and TDFN.