SI53314-B-GM by Silicon Labs | APACClock Buffer | Avnet ASIA
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SI53314-B-GM

Silicon Labs

Clock Fanout Buffer 6-OUT 32-Pin QFN

制造商料号#: SI53314-B-GM

替代型号#: SI53314-B-GM


legend 通过RoHS认证

描述

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替代/替换

信息

The Si53314 is an ultra low jitter six out put differential buffer with pin-selectable output clock signal format and individual OE. The Si53314 features a 2:1 mux making it ideal for redundant clocking applications. The Si53314 utilizes Silicon Laboratories' advanced CMOS technology to fanout clocks from dc to 1.25 GHz with guaranteed low additive jitter, low skew, and low propagation delay variability. The Si53314 features minimal cross-talk and provides superior supply noise rejection, simplifying low jitter clock distribution in noisy environments. Independent core and output bank supply pins provide integrated level translation without the need for external circuitry

技术参数

  • 6 differential or 12 LVCMOS outputs
  • Ultra-low additive jitter: 45 fs rms
  • Wide frequency range: dc to 1.25 GHz
  • Universal input with pin selectable output formats
  • LVPECL, Low Power LVPECL, LVDS, CML, HCSL, LVCMOS
  • 2:1 mux with hot-swappable inputs
  • Individual output enable
  • Independent VDD and VDDO:1.8/2.5/3.3 V
  • 1.2/1.5 V LVCMOS output support
  • Excellent power supply noise rejection (PSRR)
  • Selectable LVCMOS drive strength to tailor jitter and EMI performance
  • Small size: 32-QFN (5x5 mm)
  • RoHS compliant, Pb-free
  • Industrial temperature range: –40 to +85°C

技术特性

描述
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Maximum Duty Cycle
60 %
Max Processing Temp
260
Operating Temperature
-40 to 85 °C
Maximum Operating Supply Voltage
3.63 V
Mounting
Surface Mount
Number of Outputs per Chip
6
Lead Finish
Tin
Minimum Operating Supply Voltage
1.71 V
Operating Supply Voltage
1.8|2.5|3.3 V
Maximum Input Frequency
1250 MHz

ECCN / UNSPSC

描述
ECCN:
EAR99
计划交货期 B:
8542.3200-00
HTSN:
8542.3200-00
UNSPSC:
32101600
UNSPSC VERSION:
V15.1101
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