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信息

SI53313-B-GM

Silicon Labs

Buffer 10-CH Inverting/Non-Inverting CMOS 44-Pin QFN

制造商料号#: SI53313-B-GM

替代型号#: SI53313-B-GM


legend 通过RoHS认证

描述

文档

替代/替换

信息

The Si53313 is an ultra low jitter dual 1:5 differential buffer with pin-selectable output clock signal format and divider selection. The Si53313 utilizes Silicon Laboratories' advanced CMOS technology to fanout clocks from dc to 1.25 GHz with guaranteed low additive jitter, low skew, and low propagation delay variability. The Si53313 features minimal cross-talk and provides superior supply noise rejection, simplifying low jitter clock distribution in noisy environments. Independent core and output bank supply pins provide integrated level translation without the need for external circuitry

技术参数

  • 2 independent banks of 5x differential outputs
  • Ultra-low additive jitter: 45 fs rms
  • Wide frequency range: dc to 1.25 GHz
  • Any-format input with pin selectable output formats: LVPECL, Low Power LVPECL, LVDS, CML, HCSL, LVCMOS
  • Asynchronous output enable
  • Low output-output skew: <70 ps
  • Output clock division: /1, /2, /4 (dc to 725 MHz for /2 and /4)
  • Independent VDD and VDDO:1.8/2.5/3.3 V
  • Excellent power supply noise rejection (PSRR)
  • Small size: 44-QFN (7 mm x 7 mm)
  • RoHS compliant, Pb-free
  • Industrial temperature range:–40 to +85°C

技术特性

描述
寻找类似物料
Bus Hold
No
Maximum Operating Supply Voltage
1.89|2.63|3.63 V
Number of Outputs per Chip
10
Screening Level
Industrial
Mounting
Surface Mount
Number of Elements per Chip
2
Number of Channels per Chip
10
Minimum Operating Supply Voltage
1.71|2.38|2.97 V
Lead Finish
Tin
Number of Inputs per Chip
2
Logic Function
Buffer
Polarity
Inverting|Non-Inverting
Operating Temperature
-40 to 85 °C
Max Processing Temp
260
Fabrication Technology
CMOS
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Number of Output Enables per Chip
2

ECCN / UNSPSC

描述
ECCN:
EAR99
计划交货期 B:
8542390000
HTSN:
8542390000
UNSPSC:
32101600
UNSPSC VERSION:
V15.1101
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