Manufacturer:
Vishay
Si7121DN-T1-GE3
Trans MOSFET P-CH 30V 10.6A 8-Pin PowerPAK 1212 T/R
Avnet Manufacturer Part #:
SI7121DN-T1-GE3
RoHS 10 Compliant
The attached SPICE model describes the typical electrical characteristics of the p-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C to + 125 °C temperature ranges under the pulsed 0 V to 10 V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.
Key Features
- P-Channel Vertical DMOS
- Macro Model (Subcircuit Model)
- Level 3 MOS
- Apply for both Linear and Switching Application
- Accurate over the - 55 °C to + 125 °C Temperature Range
- Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics
Technical Attributes
Find Similar Parts|
|
Description | Value |
|---|---|---|
|
|
Operating Temperature Max | 150 |
|
|
Rds(on) Test Voltage | 10 |
|
|
No. of Pins | 8 |
|
|
Transistor Mounting | Surface Mount |
|
|
Drain Source Voltage Vds | 30 |
|
|
Channel Type | P |
|
|
Power Dissipation | 52 |
|
|
Drain Source On State Resistance | 18 |
|
|
Transistor Case Style | PowerPAK 1212 |
|
|
MSL Level | MSL 1 - Unlimited |
|
|
Continuous Drain Current Id | 16 |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| ECCN: | EAR99 |
| SCHEDULE B: | PARTS... |
| HTSN: | PARTS... |