The TPS3824 is supervisors provide circuitinitialization and timing supervision, primarily for DSPand processor-based systems. During power-on,RESET asserts when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supplyvoltage supervisor monitors VDD and keeps RESETactive as long as VDD remains below the thresholdvoltage, VIT−. An internal timer delays the return ofthe output to the inactive state (high) to ensure propersystem reset. The delay time, td, starts after VDD hasrisen above the threshold voltage, VIT−. When thesupply voltage drops below the threshold voltageVIT−, the output becomes active (low) again. Noexternal components are required. All the devices ofthis family have a fixed-sense threshold voltage, VIT–, set by an internal voltage divider.
Power-On Reset Generator With Fixed Delay Time of 200 ms (TPS3824)
Reset Output Available in Active-Low (TPS3824), Active-High (TPS3824
Supply Voltage Supervision Range: 2.5 V, 3 V, 3.3 V, 5 V