ADC12DL040CIVSX/NOPB by Texas Instruments | ADCs | Avnet ASIA
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ADC12DL040CIVSX/NOPB

Texas Instruments

ADC Dual Pipelined 40Msps 12-bit Parallel 64-Pin TQFP T/R

Manufacturer Part #: ADC12DL040CIVSX/NOPB

Alternate Part #: ADC12DL040CIVSX/NOPB


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The ADC12DL040 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 40 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 250 MHz Full Power Bandwidth. Operating on a single +3.0V power supply, the ADC12DL040 achieves 11.1 effective bits at nyquist and consumes just 210 mW at 40 MSPS, including the reference current. The Power Down feature reduces power consumption to 36 mW.

The differential inputs provide a full scale differential input swing equal to 2 times VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. The digital outputs from the two ADC's are available on a single multiplexed 12-bit bus or on separate buses. Duty cycle stabilization and output data format are selectable using a quad state function pin. The output data can be set for offset binary or two's complement.

To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC12DL040 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage.

This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process.

 

Key Features

  • Single +3.0V Supply Operation
  • Internal Sample-and-Hold
  • Internal Reference
  • Outputs 2.4V to 3.6V Compatible
  • Power Down Mode
  • Duty Cycle Stabilizer
  • Multiplexed Output Mode
  • Resolution 12 Bits
  • DNL ±0.3 LSB (typ)
  • SNR (fIN = 10 MHz) 69 dB (typ)
  • SFDR (fIN = 10 MHz) 85 dB (typ)
  • Data Latency 7 Clock Cycles
  • Power Consumption
    • Operating 210 mW (typ)
    • Power Down Mode 36 mW (typ)
  • Technical Attributes

    Description
    Value
    Find similar Parts
    Differential Nonlinearity
    -0.9/0.96 LSB
    Input Signal Type
    Single-Ended|Differential
    Architecture
    Pipelined
    Operating Temperature
    -40 to 85 °C
    Number of Analog Inputs
    2
    Maximum Single Supply Voltage
    3.6 V
    Differential Input
    Yes
    No Missing Codes
    12 Bit
    Voltage Reference
    Internal|External
    Max Processing Temp
    260
    Supplier Package
    TQFP
    MSL Level
    3
    Sample and Hold
    Yes
    Single-Ended Input
    Yes
    Input Type
    Voltage
    Voltage Supply Source
    Analog and Digital
    Screening Level
    Industrial
    Typical Single Supply Voltage
    3 V
    Product Dimensions
    10 x 10 x 1 mm
    Typical Power Dissipation
    210 mW
    Integral Nonlinearity Error
    ±2.6 LSB
    Sampling Rate
    40 Msps
    Full Scale Error
    3.6 % of FSR
    Pin Count
    64
    Digital Interface Type
    Parallel
    Input Voltage
    2 Vp-p
    Digital Supply Support
    Yes
    Resolution
    12 Bit
    Signal to Noise Ratio
    69 dB
    Lead Finish
    Matte Tin
    Mounting
    Surface Mount
    Number of ADCs
    2
    Minimum Single Supply Voltage
    2.7 V

    ECCN / UNSPSC

    Description
    Value
    ECCN:
    EAR99
    SCHEDULE B:
    8542.2900-00
    HTSN:
    8542.2900-00

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