MC74HC574ADTR2G by ON Semiconductor | Flip Flops | Avnet ASIA
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MC74HC574ADTR2G

ON Semiconductor

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP T/R

Manufacturer Part #: MC74HC574ADTR2G

Alternate Part #: MC74HC574ADTR2G


RoHS Compliant

Descriptions

Documents

Subs/Alternatives/Related

Information

High-Performance Silicon-Gate CMOSThe MC74HC574A is identical in pinout to the LS574. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.Data meeting the setup time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does not affect the states of the flip-flops, but when Output Enable is high, all device outputs are forced to the high-impedance state. Thus, data may be stored even when the outputs are not enabled.The HC574A is identical in function to the HCT374A but has the flip-flop inputs on the opposite side of the package from the outputs to facilitate PC board layout.

Key Features

  • Output Drive Capability: 15 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS and TTL
  • Operating Voltage Range: 2.0 to 6.0 V
  • Low Input Current: 1.0 mA
  • In Compliance with the Requirements Defined by JEDEC Standard No. 7A
  • Chip Complexity: 266 FETs or 66.5 Equivalent Gates
  • Pb-Free Packages are Available

Technical Attributes

Description
Value
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Number of Element Inputs
8
Logic Function
D-Type Bus Interface
Supplier Package
TSSOP
Pin Count
20
MSL Level
1
Lead Finish
Gold
Maximum Operating Supply Voltage
6 V
Minimum Operating Supply Voltage
2 V
Fabrication Technology
CMOS
Number of Elements per Chip
1
Number of Element Outputs
8
Number of Output Enables per Element
1
Input Signal Type
Single-Ended
Product Dimensions
6.6 x 4.5 x 1.05 mm
Maximum Low Level Output Current
7.8 mA
Output Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum CL
160@2V|105@3V|32@4.5V|27@6V ns
Output Type
3-State
Triggering Type
Positive-Edge
Maximum High Level Output Current
-7.8 mA
Typical Operating Supply Voltage
2.5|3.3|5 V
Number of Channels per Chip
8
Bus Hold
No
Propagation Delay Test Condition
50 pF
Maximum Quiescent Current
0.004 mA
Mounting
Surface Mount
Max Processing Temp
260
Polarity
Non-Inverting
Operating Temperature
-55 to 125 °C

ECCN / UNSPSC

Description
Value
ECCN:
EAR99
SCHEDULE B:
8541.29-00
HTSN:
8541.29-00
UNSPSC:
32101634
UNSPSC VERSION:
V15.1101
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