MC14543BDR2G by ON Semiconductor | Decoders & Demux | Avnet ASIA
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MC14543BDR2G

ON Semiconductor

Latch/Decoder/Driver Single 4-to-7 16-Pin SOIC T/R

Manufacturer Part #: MC14543BDR2G

Alternate Part #: MC14543BDR2G


RoHS Compliant

Descriptions

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Information

The MC14543B BCD-to-seven segment latch/decoder/driver is designed for use with liquid crystal readouts, and is constructed with complementary MOS (CMOS) enhancement mode devices. The circuit provides the functions of a 4-bit storage latch and an 8421 BCD-to-seven segment decoder and driver. The device has the capability to invert the logic levels of the output combination. The phase (Ph), blanking (BI), and latch disable (LD) inputs are used to reverse the truth table phase, blank the display, and store a BCD code, respectively. For liquid crystal (LC) readouts, a square wave is applied to the Ph input of the circuit and the electrically common backplane of the display. The outputs of the circuit are connected directly to the segments of the LC readout. Applications include instrument (e.g., counter, DVM etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses.

Key Features

  • Latch Storage of Code
  • Blanking Input
  • Readout Blanking on All Illegal Input Combinations
  • Direct LED (Common Anode or Cathode) Driving Capability
  • Supply Voltage Range = 3.0 V to 18 V
  • Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range
  • Pin-for-Pin Replacement for CD4056A (with Pin 7 Tied to VSS).
  • Chip Complexity: 207 FETs or 52 Equivalent Gates
  • Pb-Free Packages are Available

Technical Attributes

Description
Value
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Number of Element Inputs
4
Typical Operating Supply Voltage
3.3|5|9|12|15 V
Operating Temperature
-55 to 125 °C
Product Dimensions
10 x 4 x 1.5 mm
Maximum Operating Supply Voltage
18 V
Supplier Package
SOIC
Number of Input Enables per Element
1
Maximum Propagation Delay Time @ Maximum CL
1650@5V|660@10V|495@15V ns
Number of Element Outputs
7
Propagation Delay Test Condition
50 pF
Polarity
Non-Inverting
Mounting
Surface Mount
Max Processing Temp
260
Maximum Low Level Output Current
4.2(Min) mA
Maximum Quiescent Current
0.02 mA
Maximum High Level Output Current
-4.2(Min) mA
Pin Count
16
Screening Level
Extended Industrial
Logic Function
Latch/Decoder/Driver
MSL Level
1
Minimum Operating Supply Voltage
3 V
Number of Elements per Chip
1
Lead Finish
Matte Tin
Fabrication Technology
CMOS

ECCN / UNSPSC

Description
Value
ECCN:
EAR99
SCHEDULE B:
8542390000"
HTSN:
8542390001"
UNSPSC:
32101600
UNSPSC VERSION:
V15.1101
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