The CS2100-CP-CZZ is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2100-CP-CZZ is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for generation of a low-jitter clock relative to an external noisy synchronization clock at frequencies as low as 50 Hz. The CS2100-CP-CZZ supports both I²C and SPI for full software control. The CS2100-CP-CZZ is available in a 10-pin MSOP package in Commercial (-10°C to +70°C) and AutomotiveD (-40°C to +85°C) and Automotive-E (-40°C to +105°C) grades. Customer development kits are also available for device evaluation.
Clock Multiplier / Jitter Reduction
Generates a Low Jitter 6 - 75 MHz Clock from a Jittery or Intermittent 50 Hz to 30 MHz Clock Source
Highly Accurate PLL Multiplication Factor
Maximum Error Less Than 1 PPM in HighResolution Mode