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SN74AVCB164245VR

Texas Instruments

Bus XCVR Dual 16-CH 3-ST 48-Pin TVSOP T/R

Manufacturer Part #: SN74AVCB164245VR

Alternate Part #: SN74AVCB164245VR


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This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB.

To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, both ports are in the high-impedance state.

Key Features

  • Member of the Texas Instruments Widebus™ Family
  • DOC™ Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
  • Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.5-V VCC
  • Control Inputs VIH/VIL Levels Are Referenced to VCCB Voltage
  • If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
  • Ioff Supports Partial-Power-Down Mode Operation
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.4-V to 3.6-V Power-Supply Range
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Technical Attributes

    Description
    Value
    Find similar Parts
    Maximum Propagation Delay Time @ Maximum CL
    6@1.8V ns
    Typical Operating Supply Voltage
    1.8|2.5|3.3 V
    Data Flow Direction
    Bi-Directional
    Input Level
    CMOS
    Number of Channels per Chip
    16
    Propagation Delay Test Condition
    30 pF
    Output Type
    3-State
    Minimum Operating Supply Voltage
    1.4 V
    Maximum Quiescent Current
    40 uA
    Operating Temperature
    -40 to 85 °C
    Max Processing Temp
    260
    Number of Output Enables per Element
    1 Low
    Lead Finish
    Gold
    Fabrication Technology
    CMOS
    Output Level
    CMOS
    Number of Elements per Chip
    2
    Polarity
    Non-Inverting
    Maximum Low Level Output Current
    12 mA
    Mounting
    Surface Mount
    Bus Hold
    No
    Maximum High Level Output Current
    -12 mA
    Logic Function
    Bus Transceiver with Voltage Translation
    Screening Level
    Commercial
    Tolerant I/Os
    4.6 V
    Number of Direction Control Inputs
    1 Low/High
    Maximum Operating Supply Voltage
    3.6 V

    ECCN / UNSPSC

    Description
    Value
    ECCN:
    EAR99
    SCHEDULE B:
    8542.2900-00
    HTSN:
    8542.2900-00
    UNSPSC:
    32101654
    UNSPSC VERSION:
    V15.1101

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